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CC2530: Reset Level

Mario DW
Genius 3145 points
Part Number: CC2530
Other Parts Discussed in Thread: CC-DEBUGGER, TPS65910

Given the issues I have to reset the CC2530 from the software running on the AM335x based platform, I checked the analog value of the reset.  I had the impression that I needed to do a power cycle to reset the CC2530, but I've tried enough times to reset the ZNP by conrolling the reset from SW without success followed by a power cycle that succeeded, that I am now pretty close to certain that there is an issue with the RESET_N input signal: 

image

As far as I understand from the specification, when powered at 3.3V, the logic input level must be minimum 2.5V for all digital inputs in order to have a valid HIGH value.  As at the same time the CC2530 only guarantees an output of 2.4V@4mA, I wanted to double check this with a TI Expert.  I may have overlooked a comment specific to the reset level.

image

What is the minimum reset level?  Is the reset signal shown above ok?

  • 0
    TI__Mastermind 27145 points

    Hi,

    As Reset is an input signal, it should meet the Logic input voltage levels (Min 2.5V for High and Max 0.5V for Low).

    Yes, the Logic Output Minimum voltage is 2.4V.

    Are you saying that, when you use Reset from the Software, the level on the RESET Pin is not going to 0 Level? RESET is active Low.

    If that is the case, Can you check the Reset level from AM335X device (with and without Reset connection to CC2530) ?

    Thanks,

    PM

  • 0 in reply to PM
    Genius 3145 points

    The waveform (first image) is the reset signal from the AM335x.  I guess that the high level is not better with the CC-Debugger.

    According to the company that designed the board, the TPS65910 is set to power the I/O at 1.8V .But they do not think that this has an impact on the reset because it is active at less than 0.5V.

    They have to come back to me with a proposal to increase the voltage.  I am going to confirm that you confirmed the required voltage level(s).

    Thanks

    Mario

  • 0 in reply to Mario DW
    TI__Guru**** 317180 points

    The min/ max levels for a logic input as given in the table in one of the previous posts are given for a VDD = 3.0 V. If you power the chip with 1.8 V the levels scale with 1.8/3. If you power th chip with 1.8 V you also have to ensure that any pins are higher than this level.

  • 0 in reply to TER
    Genius 3145 points

    The chip is powered at 3.3V, so the HW should ensure 2.75V when applying the rule of 3.

  • 0 in reply to Mario DW
    TI__Mastermind 27145 points

    Hi,

    Yes, your assumption is correct.

    Thanks,

    PM