What does following graph tell? What is the differential input voltage?
What will be input bias current for the following circuit (LM111)? Voltage at Non-Inverting Pin = -8.5V (Vref LTP) & -9.5V (Vref UTP)
Kamlesh,
The graph says IIB changes with VID because the Zener diodes turns on around +/-6V.
Differential input voltage is (VE+) - (VE-). 1V in this case
IIB of Ve+ is -90nA
IIB of Ve- is -60nA
Current flows out of the LM111 input pins because the input transistors are PNP.
Sir,
Thanks a lot for your answer.
I am trying to have LTP and UTP for following circuit as -9.5 and -8.5 which is coming as expected at non-inverting input. However, output is changing state when input crosses reference at non-inverting terminal+100mV
What could be the reasons for this 100mV offset?
LM111 comparator is used in the circuit
(Pull up resistor for LM111 is not shown in the above circuit)
Sir,
I could get rid of noise by using shielded DMM probes. However I could not get rid of 100 mV offset between Non-Inverting and Inverting Pin of LM111 comparato while achieving LTP of -10V and UTP of -9V.
Could it be because of high input resistance value of 510 kilo-ohms used in between Inverting terminal and ground? Could Input bias current create offsets due to unmatched externally resistances at Inverting and Non-Inverting terminal of LM111?
Also. Input signal is given though diode as shown in the following diagram. Could diode non-linearity be the reason behind offset of 100mV between Inverting and Non-Inverting terminal of op-amp while achieving LTP of -10V and UTP of -9V?
