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LMH6554, SE to Diff, DC coupled: high group delay variation.

David D
Intellectual 580 points
Other Parts Discussed in Thread: LMH6554, LMH5401, LMH6550

Hello,

I'm using the LMH6554 in SE to Differential configuration, DC coupled connectivity.

Similar to the scheme at Figure 27 in the datasheet:

The problem I encounter is  high Group Delay Variation at low input frequencies: 

The input-to-output propagation delay drops from ~30nS @ ~650KHz to almost zero @ >1.5MHz.

Such a high variation causes degradation in system performance.

Please advise:

Is it an expected behavior of LMH6554?

Which circuit parameters can be trimmed in order to reduce the delay variation?

Thanks,

David.

  • 0
    TI__Genius 13935 points
    Hello David,

    The 30ns number sounds larger than I would expect. Are you using any capacitors in the circuit? What value of power supply bypass capacitors do you have?

    I think that at least some of the group delay variation you observe is caused by thermal gradients on the chip. At frequencies in the hundreds of kiloHertz range, the individual transistors on the chip are heating up and cooling down in response to the signal frequency. This casues a small phase anamoly at these frequencies only. It should be pretty repeatable so it may be possible to equalize them out.

    If you need a very large bandwidth part we have the LMH5401. It uses a slightly different internal architecture that will reduce the differential group delay variation due to thermal gradients.

    If you can get away with less bandwidth the LMH6550 might work, but it is significantly slower.

    Regards,
    Loren
  • 0 in reply to Loren Siebert 1
    Intellectual 580 points

    Hi Loren,

    Thank you for the prompt response.

    The value of power supply bypass capacitors are: 10uF, 0.1uF, 0.01uF (on each of the four supply pins). We use split supply with offset :V+=3.3V,V-=-1.7V due to low output Vcm=~0.5V.

    Worth noting that the problem appeared only when we changed the assembly to support SE-DE operation, while DE-DE was ok.

    Is the issue you mention related to the behaviour of the phase plot in Figure 22 -Open Loop Transimpedance?   Can you estimate how much improvement will we get if we switch to LMH5401( which is better than LMH6550 as it seems to be pin compatible with LMH6554)? 

    Thanks,

    David.

     

  • 0 in reply to David D
    TI__Genius 13935 points

    Hi David,

    Your supply bypassing sounds ideal.  Is there any capacitance in the signal path?  Are you using solid planes for power?

    I am out of the office this week, so I can't get to the lab to confirm group delay.  I still think 30ns is larger than expected, so it's possible there is something in the SE/DE circuit that could be optimized. 

    If you can wait until next week I should be able to set up an EVM and run some tests and compare the LMH6554 with the LMH5401. 

    Regards,

    Loren