AM335x DDR3 RAM

Nick King

Dear TI

on the BBB the DDR3(MT47H128M16RT-25E:C 96 pin ball) schematics pin M7 is assigned as Address15 but datasheet says it is NC(Not connected)

is it correct to say M7 pin as A15

Regards

Nick

over 8 years ago

0 WTMEC_FoneC over 8 years ago

Intellectual 535 points

Hi,

For your reference,
Our design leaves the pin connected in case we need 64K(A[15:0]) row address for 512Mx16 option.

0 Nick King over 8 years ago in reply to WTMEC_FoneC

Expert 1280 points

thanks guys this DDR3 RAM used in beaglebone minimum order quantiy is 1000 from most of the distributor hence i have decided to use IS43TR16256AL-125KBLI bellow is datasheet link

i wanted to know

is there any change is the schematics point of view.
is there any changes to be done from software point of view.

Regards

0 Brad Griffis over 8 years ago in reply to Nick King

TI__Guru*** 125430 points

The DDR3 ballout is specified by the JEDEC standard, so you should be able to pop in a replacement without any changes. In terms of software, you would need to calculate the appropriate timings based on the data manual, and re-run the leveling procedure to come up with the appropriate values.

These wiki pages are applicable:

processors.wiki.ti.com/.../AM335x_EMIF_Configuration_tips
processors.wiki.ti.com/.../AM335x_DDR_PHY_register_configuration_for_DDR3_using_Software_Leveling

0 Nick King over 8 years ago in reply to Brad Griffis

Expert 1280 points

Thanks brad
Basically this chip was suggested by mouser.co.uk as an alternate component to the DDR3 RAM which is present in beagle bone because its minimum order quantity was 1000
in terms of schematics there is no change.
in terms of software can you please let me know which file needs to be modified and what are the correct timings for this new chip IS43TR16256AL-125KBLI it would be great if you can send us the modified file to be used

Regards

0 Brad Griffis over 8 years ago in reply to Nick King

TI__Guru*** 125430 points

Nick King said:
in terms of software can you please let me know which file needs to be modified

The timings get utilized in u-boot/board/ti/am335x/board.c. Look for the call to config_ddr() in that function. There's a struct pointer passed to that function. The corresponding structure contains the timings.

Nick King said:
what are the correct timings for this new chip IS43TR16256AL-125KBLI it would be great if you can send us the modified file to be used

Use the DDR calculation tool from this page:

http://processors.wiki.ti.com/index.php/AM335x_EMIF_Configuration_tips

That will get you the 3 timing registers. The rest of the wiki page has info pertaining to the rest of the registers.

And as I mentioned previously, you'll need to re-run software leveling:

http://processors.wiki.ti.com/index.php/AM335x_DDR_PHY_register_configuration_for_DDR3_using_Software_Leveling

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AM335x DDR3 RAM