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Baking Conditions for QFN Packages

vijetha hn
Expert 1230 points
Other Parts Discussed in Thread: CDCE62005

Dear Sir We are using QFN and SON Package ICs of Part numbers CDCE62005RGZT, CDCLVD1208RHDT, CDCLVD1204RGTT and TPS51200DRCR.

CDCE62005 IC has MSL level of 3 and other ICs have MSL of 2.

The question is about Baking Requirements for these ICs.

I got an application note SCBA017D from TI which gives following details for MSL 2-5a (shown in image)

The ICs are not mounted before their floor lives (168 hours for Level 3 and 1 year for Level 2). In that case for both level 2 and Level 3, should I follow the instruction that " Bake for 48 hours at 125 deg C" for QFN/SON package ICs of above part numbers? Does this baking instruction applicable for QFN / SON packages of Level 2 and 3?

If not can you suggest the exact baking hours for these ICs? Please clarify

  • 0
    TI__Expert 5325 points

    Hello Vijetha,

    I will have to consult internally about your question. Please allow some time to come back to you.


    Best regards,

    Patrick

  • 0 in reply to Patrick Kammermayer
    TI__Expert 5325 points

    Hello Vijetha,

    in general please refer to "JSTD033B01" Standard.

    In the standard you will find "Table 4-1". This contains the "Reference Conditions for Drying Mounted" or "Un-mounted SMD Packages".

    Considering all packages have body thicknesses <0.9mm, we would recommend following baking at the user site:

    Device Bake Time in Hours Temperature in Deg C
    CDCE62005RGZT 7 125
    CDCLVD1208RHDT 16 125
    CDCLVD1204RGTT 7 125
    TPS51200DRCR 7 125

    Please keep in mind that the standard Tape & Reel material will not withstand 125°C bake temperature.

    If the units are packed in JEDEC Trays, there are some available which can withstand the bake temperatures up to 150°C.

    Best regards,

    Patrick

  • 0 in reply to Patrick Kammermayer
    Expert 1230 points

    Hi Patrick,

    Thank you for the details. I have gone through the standard. Actually we need details on BAKING REQUIREMENT at ASSEMBLY HOUSE. There is a statement in the spec which says that the table mentioned in your reply is for Baking (drying) at distributor place. 

    But I need baking requirements at Assembly Place which I feel is USER SITE (please correct me If I am wrong). The table 4.1 is:

    As per this the baking conditions are 5 Hours at 125 deg C for MSL 2 and 9 hours at 125 deg C for MSL 3. 

    There is a confusion with the details given in table 4.1 and 4.2. Please confirm which one to follow for these QFN and SON package ICs?

    Regards,

    Vijetha

  • 0 in reply to vijetha hn
    TI__Expert 5325 points

    Hello Vijetha,

    I received following clarification from our experts:

    User site is the customer assembly site, the one who is mounting the drypacked components on boards. Assembly site referred in the Jedec Spec means the component manufacturer assembly site.

    To be on the save side, take the longer bake time (4.2) if the saturation of the units in the customer assembly site can not be determined.

    Best regards,

    Patrick

  • 0 in reply to Patrick Kammermayer
    Expert 1230 points

    Thank your. I will go ahead with the following baking hours as per the table 4.2.

    Device Bake Time in Hours Temperature in Deg C
    CDCE62005RGZT (MSL 3) 16 125
    CDCLVD1208RHDT (MSL 2) 7 125
    CDCLVD1204RGTT (MSL 2) 7 125
    TPS51200DRCR (MSL 2) 7 125

    Regards,

    Vijetha