LMK04828: Output phase noise due to PLL1 phase detector frequency

Alice57

Part Number: LMK04828

Hello Team,

Is there a relationship between PLL1 phase detector frequency setting and output phase noise?

Customer set PLL1 phase detector frequency as 10kHz. When they capture the clock output phase noise, there are high level spur on 10kHz, 20kHz, 30kHz and 40kHz. But when customer increase the PLL1 phase detector frequency like 312.5kHz, there's no spur.

Here is the clock configuration.

CLKin = 30.72MHz

External VCXO = 156.25MHz

OSCin = 156.25MHz

Best regards,

Alice

over 5 years ago

0 Shawn Han over 5 years ago

TI__Genius 9920 points

Hi Alice,
It is true that phase detect frequency (PDF) leakage becomes spurs. When PDF is large, loop filter can suppress the spurs out side of bandwidth.
So normally, we'll select PDF as large as possible.

Best Regards,
Shawn

0 Alice57 over 5 years ago in reply to Shawn Han

TI__Intellectual 1730 points

Hi Shawn,

Thank you for the reply.

Why PDF leakage occurred when PDF going lower frequency?

Best regards,
Alice

0 Shawn Han over 5 years ago in reply to Alice57

TI__Genius 9920 points

Hi Alice,

Good question. PDF leakage is always there. Besides loop filter effect, PDF frequency also is a factor to affect leakage contribution.

Refer to my attachment.

VCXO Leakage Current and PLL Lock v1.0.pdf

Best Regards,

Shawn

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LMK04828: Output phase noise due to PLL1 phase detector frequency