LMK03328: No output clock

Hello,

Please first check if the PLL is locked and if there's loss of PRIREF by checking the level of status pins. Status can be set in "Status" tab in the left pane of Ticspro. If the PLL is locked then check if the outputs are muted by measuring the level of GPIO0 pin.

Regards,

Hao

Hello,

I checked the level of status pin of PRIREF Low. It's low level.

I connected PRIREF_P-pin to single-ended 25MHz clock and PRIREF_N-pin to GND via pull-down resistor.

I measured the single-ended 25MHz clock. Frequency and amplitude are O.K. But, The slew rate of waveform was slow. The rising/falling time was about 6.3ns/5.3ns.

Next, I changed register setting as folows. And check the status pin of PRIREF again. It's high level. In addition, PLL1_LOL and PLL2_LOL were high. But PLL1_RDIV/2 & NDIV/2 and PLL1 VCO CAL were low (The result of PLL2 was the same as PLL1's). 

-> Q1. I changed PREREF input as diffrential in spite of single-end input. Is it O.K ?

-> Q2. Please advise about RDIV/NDIV/VCO CAL issue.

-> Q3. Please confirm status register setting as follows.

Hello,

I'm a little confused when you say pin level is low or high. According to your setting, the status pin is active high. For example, when you select PLL1_LOL (PLL1 Loss Of Lock), if the status pin is high, it means that "loss of lock" is true so that PLL is actually unlocked. Can you check again if your PLLs are locked or unlocked and if the input is detected or not detected and rephrase your question in that way?

When you check the AC termination box, it adds a 100Ohm diff resistor between input_N and input_P. Since you tied one of them to ground, it essentially just adds a 100Ohm to ground for the other pin. It's up to you how you need to terminate the previous stage.

Regards,
Hao

Hello,

I'm sorry that I confuse you. My understanding was not correct.

I revised register setting and confirmed it again.

[Results]

- PLL1_LOL     -> the status pin was low. Thus PLL1 was locked.

- PLL1_RDIV/2 -> the freqency of status pin's waveform was correct.

- PLL1_MDIV/2-> the freqency of status pin's waveform was correct.

- PLL1_NDIV/2-> the freqency of status pin's waveform was correct.

- PLL1 VCO CAL ->the status pin was low. Thus, VCO CAL was done.  ( When I toggled RESETN_SW, the status pin was also high / low toggling)

When I measure AC-LVDS output in above condition,  OUT0_P was 1.8V and OUT0_N was 0V. I couldn't confirm 100MHz differenctial clk waveform.

And R12.6 register value is '1' when I checked by TICS-PRO. Please advise this output issue.

Regards,

Kazuya

Hello,

I confirmed a level of GPIO0 by addition. The level was 0.

After that, I confirmed a register12.6 again. The value was 1. (The R12 value was 0x0CD9.)

I pulled up GPIO0 pin via external resister 13Kohm, because GPIO0 pin is NC(Not Connected) on a our PCB.

So, I can confirm output clock !

In an EEPROM mode, is there the method to set GPIO0 in '1' without pull up resistance adding?

Could you advise it ?

Regards,

Kazuya