C5515 GPIO output

Hi,

I want to set GPIO-18 and GPIO-20 on output mode , control high/low.

The code cannot work normally for GPIO-18 and GPIO-20.

Please guide me GPIO setting.

CPU:C5515

Board:costom

==================================

typedef enum {

/** GPIO as i/p */
CSL_GPIO_DIR_INPUT = 0,
/** GPIO as o/p */
CSL_GPIO_DIR_OUTPUT = 1

} CSL_GpioDirection;

typedef enum {
/** Gpio pin 18 */
CSL_GPIO_PIN18 = 18,

/** Gpio pin 20 */
CSL_GPIO_PIN20 = 20,
} CSL_GpioPinNum;

main()

{

gpioIoDir = 
(((Uint32)CSL_GPIO_DIR_OUTPUT)<<CSL_GPIO_PIN18) |
(((Uint32)CSL_GPIO_DIR_OUTPUT)<<CSL_GPIO_PIN20);

gpioInit(gpioIoDir, 0x20600340, 0x00600340);

dbgGpioWrite(1, 18);
dbgGpioWrite(0, 18);

dbgGpioWrite(1, 20);
dbgGpioWrite(0, 20);

}

//// gpio init area

Int16 gpioInit(
Uint32 ioDir,
Uint32 intEn,
Uint32 intEdg
)
{
CSL_Status status;
CSL_GpioConfig config;

/* Open GPIO module */
hGpio = GPIO_open(&gGpioObj, &status);
if ((hGpio == NULL) || (status != CSL_SOK))
{
return GPIOCTRL_OPEN_FAIL;
}

/* Reset GPIO module */
status = GPIO_reset(hGpio);
if (status != CSL_SOK)
{
return GPIOCTRL_RESET_FAIL;
}

/* Configure GPIO module */
config.GPIODIRL = ioDir & 0xFFFF;
config.GPIODIRH = ioDir >> 16;
config.GPIOINTENAL = intEn & 0xFFFF;
config.GPIOINTENAH = intEn >> 16;
config.GPIOINTTRIGL = intEdg & 0xFFFF;
config.GPIOINTTRIGH = intEdg >> 16;
status = GPIO_config(hGpio, &config);
if (status != CSL_SOK)
{
return GPIOCTRL_CFG_FAIL;
}

return GPIOCTRL_SOK;
}

GPIO_Handle GPIO_open (
CSL_GpioObj* GpioObj,
CSL_Status * status
)
{
GPIO_Handle hGpio = (CSL_GpioObj*)NULL;
/* For Invalid handle */
if(NULL == GpioObj)
{
*status = CSL_ESYS_BADHANDLE;
return NULL;
}

GpioObj->numPins = CSL_GPIO_NUM_PIN;
/* Base Address of GPIO Registers */
GpioObj->baseAddr = CSL_GPIO_REGS;
hGpio = (GPIO_Handle)GpioObj;
*status = CSL_SOK;

return hGpio;
}

CSL_Status GPIO_reset (
GPIO_Handle hGpio
)
{
/* For Invalid handle */
if(NULL == hGpio)
{
return CSL_ESYS_BADHANDLE;
}
/* Reset the GPIO Registers */
hGpio->baseAddr->IOINTEN1 = CSL_GPIO_IOINTEN1_RESETVAL ;
hGpio->baseAddr->IOINTEN2 = CSL_GPIO_IOINTEN2_RESETVAL ;

hGpio->baseAddr->IOINTFLG1 = (Uint16)(~CSL_GPIO_IOINTFLG1_RESETVAL);
hGpio->baseAddr->IOINTFLG2 = (Uint16)(~CSL_GPIO_IOINTFLG2_RESETVAL);

hGpio->baseAddr->IOINTEDG1 = (Uint16)(CSL_GPIO_IOINTEDG1_RESETVAL);
hGpio->baseAddr->IOINTEDG2 = (Uint16)(CSL_GPIO_IOINTEDG2_RESETVAL);

hGpio->baseAddr->IODIR1 = CSL_GPIO_IODIR1_RESETVAL;
hGpio->baseAddr->IODIR2 = CSL_GPIO_IODIR2_RESETVAL;

hGpio->baseAddr->IOOUTDATA1 = CSL_GPIO_IOOUTDATA1_RESETVAL;
hGpio->baseAddr->IOOUTDATA2 = CSL_GPIO_IOOUTDATA2_RESETVAL;

return CSL_SOK;
}

////////

Int16 dbgGpioWrite(Uint16 *gpioIutputValue, Uint16 pinNum)
{
CSL_Status status;
Int16 ret = GPIOCTRL_SOK;

status = (CSL_Status)GPIO_write((GPIO_Handle)hGpio, (CSL_GpioPinNum)pinNum, (Uint16)gpioIutputValue);

if(status != CSL_SOK)
{
ret = GPIOCTRL_WRITE_FAIL;
}

return ret;
}

CSL_Status GPIO_write (
GPIO_Handle hGpio,
CSL_GpioPinNum pinNum,
Uint16 buffer
)
{
Uint16 pin;
/* For Invalid handle */
if(NULL == hGpio)
{
return CSL_ESYS_BADHANDLE;
}
/* For wrong Pin Index */
if((CSL_GPIO_PIN31 < pinNum)||(pinNum < CSL_GPIO_PIN0))
{
return CSL_ESYS_INVPARAMS;
}
/* For wrong o/p write data */
if(buffer != GPIO_DRIVE_HIGH && buffer != GPIO_DRIVE_LOW)
{
return CSL_ESYS_INVPARAMS;
}

if(pinNum < CSL_GPIO_PIN16)
{
/* Lower Sixteen GPIO Pin - 0 to 15 GPIO pin */
pin = pinNum;
CSL_FINSR (hGpio->baseAddr->IOOUTDATA1,pin,pin,buffer);
}
else
{
/* Upper Sixteen 16 to 31 GPIO Pin */
pin = pinNum - CSL_GPIO_PIN16;
CSL_FINSR(hGpio->baseAddr->IOOUTDATA2,pin,pin,buffer);
}
return CSL_SOK;
}