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DS90UB954-Q1: Camera frame rate decrease by half after setting UB954 register 0x58[2:0] from 110 (default) to 101

Part Number: DS90UB954-Q1

Hi TI team

Normally my camera output 27 fps.

But after I changed  the UB954 register 0x58[2:0] from 110 (default) to 101,

the frame rate is only 13.5 fps.

I want to know the detail about this.

Does this setting influence the frequency of fpd link?

  • Pls check page100 of UB954 d/s, if the 0x58[2:0] is changed, the back rate is changed as well, and the recovered clock in the 953 side is changed as well... so the rate is down to 1/2.

    regards,
    Steven
  • Hi Steven,
    how to increase CSI output rate,we want to output 27fps camera data, now it‘s 13.5fps
    thanks
    peiyuanqing
  • 1. you re-change the back channel rate.
    2. you need change the clocking mode in your case, increase the sensor ref. clock! for example, you can change the CLK_OUT clock here, detailed, you need check the d/s on the CLK_OUT output setting.
    Regards,
    Steven
  • Hi Steven

    Refer to DS90UB954-Q1 data sheet 6.6 AC Electrical Characteristics.

    Back channel datarate is 2×REFCLK Mbps when Signal applied to REFCLK input in synchronous CSI-2 input mode.

    If I set UB954 register 0x58[2:0] from 110 (default 50Mbps) to 101(25Mbps),

    Should I change the REFCLK to half?

    But the external REFCLK range is 23- to 26-MHz.

    I have a little confused about this.

  • 1. don't mix the 954 external refclk and 953 internal clk request together, they have different clock freq. request;
    2. the description in 954 d/s 6.6 is just for fixed data rate ~4G, the relationship is correct. but you change the back channel rate, it means the sync. mode is NOT supported based on previous d/s definition.
    3. not, you can't change the 954's ref. clock.
    4. why you reduce the back channel rate? this impacts the 953's rate and sensor's rate if the sensor clock is sourced from 953's CLK_out.
    Steve