TMS320C6455 EVM Daughter card (EMIF A) control

Hi Tscheck,

Thank you for your interest and answer. Actually, my problem is that i don't know how i write or read EMIFA (Daughter card). i have csl_c6455\example\emifa, and i loaded this program and run but i didn't understand to write or read to where in this program.

in 6455 dsk,  daughter card has 0xC0000000 and 0xD0000000 adress space. so, can i write or read this adress space directly. Do you know??

Thanks again

cenk,

this programs points to the beginning of the EMIFA at the line:

Uint32 *pAsyncData = (Uint32 *)EMIFA_CE3_BASE_ADDR;

where EMIFA_CE3_BASE_ADDR is equal to 0xB0000000 that is the beginning of CE3.

Then it configures the EMIF, then it writes to it at the lines:

    tempData = 0xdeadbeef;
    for (index = 0; index < DATA_CNT; index++) {
        pAsyncData[index] = tempData;
    }

I think I understand the point of confusion...

In section 1.4, figure 1.2 of the 6455_dsk_techref.pdf guide from Spectrum digital, it says that CE4 and CE5 are routed to the daughter card.  But, in table 2 and the schematics found later in the document, it says that CE2 and CE3 are routed to the expansion interface connector.  I think the section 1.4 is in error.  As Marianna stated, you should be able to use 0xB0000000 for CE3, or additionally 0xA0000000 for CE2.

Thank you Mariana and Tscheck.

yes, it is correct. so, i can write 0xA0000000 address (this address has 4 led ) or 0xB0000000(Flash). but i need to control 0xC0000000 and 0xD0000000 addresses. because i want to use a daugter card. Anyway, i still work to this.

thanks again.  

Cenk,

On more careful examination of the schematics (sheet 15 - Daughter card buffering), the CE4 and CE5 signals from the DSP go through a buffer before going to the daughtercard J4 connector.  When they go through the buffer, the signals are renamed to CE2 and CE3 as shown below. 

DSPA_TACE5Z ---> DC_CE3#

DSPA_TACE4Z ---> DC_CE2#

I didn't catch that earlier.  So, although it is not very obvious in the tech reference document, I do believe it can be explained now, for example the table 2: J4 connector description references chip enable 2 and chip enable 3, but these are after the buffer not the CE2 and CE3 directly from the DSP.  So bottom line, you should be able to access the daughter card directly using 0xC0000000 and 0xD0000000.  The EMIF setup would be the same as the example I pointed you to earlier, just change the base memory address you want to access.

Regards,

Travis

Hi Tscheck, Mariana,

thank you very much again. in Program which you said me(csl_c6455\example\emifa), i can write emifa. i  wrote CE2 and lighted the 4 leds. But i couldn't write CE4 or CE5 (0xC0000000 or 0xD0000000 addresses)... Have you ever tried to this program? Could you write (0xC0000000 or 0xD0000000) addresses in this program??

cenk albayrak said:

thank you very much again. in Program which you said me(csl_c6455\example\emifa), i can write emifa. i  wrote CE2 and lighted the 4 leds. But i couldn't write CE4 or CE5 (0xC0000000 or 0xD0000000 addresses)... Have you ever tried to this program? Could you write (0xC0000000 or 0xD0000000) addresses in this program??

Thank you TimHarron,

I will try to this.

Note that if you are not actually using a daughter card that you should still be able to view the pins toggling by pulling pin 75 on header J3 (Peripheral Expansion) to ground (use pin 77 or 79 on the same header). Pin 75 is the daughtercard select signal DC_DET which is used to tell the CPLD that there is a daughter card present. This effectively turns on the headers. Once this pin is pulled low you should be able to view the EMIF signals on the EMIF header J4.

Thank you very much,

Finally, i succeeded to write EMIFA anymore.

At first, i connected the pin 75(DC_DET) to the pin 79(ground).

Then, i used the program(emifa).

Thanks for the all answers which were very helpful to achieve it.

Hello,

My question may slightly be on a tangent. But I would like to know where I can purchase a Daughter Card for C6455? Could you suggest a few options?

Thanks,

Renuka

Renuka,

I'm personally not aware of any daughter cards for purchase, but I've forwarded your request on to others that may know differently.

Regards,

Travis

Hi Travis,

Were you able to get any leads on this? If you could let me know who I could get in touch with regarding this, that would be great

Thanks,

Renuka

Renuka,

I've asked a number of people here at TI, no one is aware of any existing EMIFA daughter cards available for resale.  I know that  a few customers have designed their own cards for this purpose.

Regards,

Travis

INT- Travis,

I have some information on this. At the link below you should be able to find a PCI/HPI daughter card  that allows you to plug in a C641x DSK into a PCI expansion slot

http://www.labmicrosystems.com/LM1000.htm.

Regards,

Renuka

Hi Mariana,

I want to ask about EMIF.

I have TMS320C6455 and I will connect it with microcontroller from AVR. I have read some reference and i get some information that it can connect with EMIF, but i get some problem when codding in CCStudio to set the initialitation for EMIF program. My question:

1. Can I connect my own TMS with microcontroller AVR, if can, how to get it?

2. Please give me the example codding of EMIF program to send data to EMIF pin in CCStudio?

3. If the EMIF cannot use for connecting TMS to microcontroller, which the other module in DSK TMS320C6455 that I can use for my project?

Thank's for helping me and I hope you can answer my question immediately because I have to finish my project as soon as posible..

thank's before,

Hisni Zainul Milah said:

Can I connect my own TMS with microcontroller AVR, if can, how to get it?

Though I am not familiar with the AVR microcontrollers, I suspect you could interface the C6455 to it. The EMIF is capable of interfacing with generic asynchronous memories, so as long as the AVR can act like a generic asynchronous memory than you should be good to go, otherwise you may have to use another interface, such as a serial port.

Hisni Zainul Milah said:

Please give me the example codding of EMIF program to send data to EMIF pin in CCStudio?

I do not believe any such examples exist, but keep in mind the EMIF is a very simple peripheral to communicate with, you just have to configure it to the proper mode (i.e. whatever the AVR requires), and than read/write the EMIF memory space. The EMIF literally maps whatever it is connected to within the internal memory space of the DSP, so you could use a pointer in C to access particular locations in the EMIF region.

Hisni Zainul Milah said:

If the EMIF cannot use for connecting TMS to microcontroller, which the other module in DSK TMS320C6455 that I can use for my project?

From a DSK perspective the primary other interface would probably be a serial port, in particular the McBSP, but it really depends on what your particular AVR microcontroller supports. Alternatives would be a HPI/PCI connection with the AVR as a master, I2C bus, or Ethernet.

Hi Bernie,

Thank's for your suggestion.

For information, i use AVR ATMega8535 microcontroller. I have done in microcontroller side. I just need 2 pin of digital output from TMS320C6455 for triggering the AVR microcontroller. I have tried EMIF and GPIO's instance program in CSL_6455/example/emif-gpio, but it didnt work in my DSK board. I followed the step of instruction from CSL datasheet. I was really dizzy because it cannot work. Please help my problem, because i have to finish my project 2 week remaining. before I say many thanks for your helping.

Best regard,

Hisni

Hisni,

Which version of the csl are you using?  The latest is at:

http://focus.ti.com/docs/toolsw/folders/print/sprc234.html

There is an emifa and a gpio example under the directory default_package\csl_c6455\example\

Besides that, all you should need is the gel files for the EVM, which can be downloaded at: http://c6000.spectrumdigital.com/dsk6455/v2/files/DSK6455.gel

Please try this latest version if you have not tried it.  Also, what do you mean exactly by "it didn't work"?  What is not working?

Regards,

Travis

Hi Travis,

Thank's for your attention in my problem. I have tried the csl's example and I have tried my own program beside the csl's datasheet, but it didnt work on my board. Is there anything else if we configure emif and gpio on the board?

Regard,

Hisni

Hisni,

Have you been able to run the CSL example on the EVM successfully?  My guess is that when you try to run the csl example on your board, you are not loading the gel file that I pointed you to above.  The gel file configures various chip resources, including enabling the EMIF.  Here is the code from the gel file:

/*--------------------------------------------------------------*/
/* init_emif()                                                  */
/* Emif initialization                                          */
/*--------------------------------------------------------------*/

#define EMIFA_BASE_ADDR (0x70000000)

#define EMIFA_MIDR     (*(int*)(EMIFA_BASE_ADDR + 0x00000000))
#define EMIFA_STAT     (*(int*)(EMIFA_BASE_ADDR + 0x00000004))
#define EMIFA_BPRIO    (*(int*)(EMIFA_BASE_ADDR + 0x00000020))
#define EMIFA_CE2CFG   (*(int*)(EMIFA_BASE_ADDR + 0x00000080))
#define EMIFA_CE3CFG   (*(int*)(EMIFA_BASE_ADDR + 0x00000084))
#define EMIFA_CE4CFG   (*(int*)(EMIFA_BASE_ADDR + 0x00000088))
#define EMIFA_CE5CFG   (*(int*)(EMIFA_BASE_ADDR + 0x0000008C))
#define EMIFA_AWCC     (*(int*)(EMIFA_BASE_ADDR + 0x000000A0))

#define DDR_BASE_ADDR (0x78000000)

#define DDR_MIDR     (*(int*)(DDR_BASE_ADDR + 0x00000000))
#define DDR_SDCFG    (*(int*)(DDR_BASE_ADDR + 0x00000008))
#define DDR_SDRFC    (*(int*)(DDR_BASE_ADDR + 0x0000000C))
#define DDR_SDTIM1   (*(int*)(DDR_BASE_ADDR + 0x00000010))
#define DDR_SDRIM2   (*(int*)(DDR_BASE_ADDR + 0x00000014))
#define DDR_DDRPHYC  (*(int*)(DDR_BASE_ADDR + 0x000000E4))

init_emif()
{
	/* Enable the async EMIF and the DDR2 Memory Controller */
	*(int *)PERCFG1 = 0x00000003;

	/* Configure async EMIF */
    EMIFA_CE2CFG = 0x00240120; /* 8-bit async, 10 cycle read/write strobe */
    EMIFA_CE3CFG = 0x00240120; /* 8-bit async, 10 cycle read/write strobe */
    EMIFA_CE4CFG = 0x00240122; /* 32-bit async, 10 cycle read/write strobe */
    EMIFA_CE5CFG = 0x00240122; /* 32-bit async, 10 cycle read/write strobe */
    EMIFA_BPRIO  = 0x000000FE; /* Enable priority based starvation control SPRU971A sec. 7.2 */

	/* Configure DDR for 500MHz operation (sequence is order dependent) */
    DDR_SDCFG    = 0x00D38822; /* Unlock boot + timing, CAS4, 4 banks, 10 bit column */
    DDR_SDRFC    = 0x000007A2; /* Refresh */
    DDR_SDTIM1   = 0x3EDB4B91; /* Timing 1 */
    DDR_SDRIM2   = 0x00A2C722; /* Timing 2 */
    DDR_DDRPHYC  = 0x00000005; /* PHY read latency for CAS 4 is 4 + 2 - 1 */
    DDR_SDCFG    = 0x00538822; /* Lock, CAS4, 4 banks, 10 bit column, lock timing */

Are you doing what's highlighted in red above?

Regards,
Travis