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Troubleshooting TFP410

Other Parts Discussed in Thread: TFP410, TFP401

Hello, I'm having some troubles with a TFP410. See the attached circuit; basically an HDMI input signal is received by a TFP401, then sent either to a video DAC to generate a VGA signal and to a TFP410 to generate an HDMI signal. The VGA signal is generated correctly (so the TFP401/DAC section should be ok), but nothing comes out from the TFP410. All signals seem to be fixed, pulled up to 3.3V by the sink (a common monitor).

I've already tried several things: decoupled the HDMI outputs, changed the clock polarity, and switched to low-swing mode by setting Vref=0.9V (the input signals are a little attenuated, they swing up to 2.3-2.4V - this could be related to the fact that the signals are "split" between two devices, or it could just be the oscilloscope's fault). Now I'm going to try to fiddle with the deskew control, but I don't think it will work, everything seems quite dead and I hope I've just made some silly mistake.

Thanks!

(update) I correct myself: only the TMDS_CLK+ and CLK- are pulled to 3.3V. The other six signals (D0+, D0-, D1+, D1-, D2+, D2-) are all fixed around 0.2-0.3 V. I don't know if there is any high-speed signal in there, with my lousy 200 MHz, 2 GSPS oscilloscope I can't see anything. Also, MSEN works correctly.

(update 2) Now I'm quite sure that the TFP410 doesn't generate any signal, it's not my oscilloscope's fault. I've measured another HDMI signal with it and I can see some clear activity (thanks to the undersampling). Therefore what I'm seeing on the TFP410 outputs should be the "real deal": a 3.3 DC voltage on TXC+ and TXC-, and a 0.3 DC voltage on all the other outputs. I've also checked again the CMOS signal levels and they are actually ok, the signals change very cleanly on the clock falling edge without any evident skew, so everything looks ok from the CMOS side. I'm starting to believe that TFP410 doesn't like what the TFP401 is generating, but I find this difficult to believe: they look like they are made to work back to back!

110 Video output 1.pdf
  • Hello Larry

    I have reviewed your schematic, it seems a good configuration. But I have my doubts about the coexistence of the TFP410 and the Video DAC. Have you tried to test your circuit removing the Video DAC IC (if you could do it)? I'll keep searching what could be your problem. Also, at what pixel rate are you working?

    Regards

    Aldo

  • Hello Aldo, thank you for the answer! At the moment I'm out of ideas, so tomorrow I will do try to remove the DAC to see what happens. I hope that the cause is not this one though, as it would be almost impossible to fix it without remastering the entire board. The CMOS signals actually look pretty clean to me; I've also taken a screenshot with the oscilloscope, tomorrow I will post it too.

    The pixel rate I'm using for most of my tests is around 100 MHz. It's the EFI BIOS boot screen of a COM Express module, so I don't have much control over it. A couple of times I've also tried to go on with the boot process, but I haven't been very thorough with this kind of tests because I was assuming that any configuration that the TFP401+DAC can handle, it would be supported also by the TFP410. On the VGA output everything works fine: the BIOS startup screen, the OS boot screen and the OS logon screen (which if I'm not wrong it's XGA at 60 Hz).

    Thanks again!

  • Hello Larry, 

    Could you also check the voltage on the /PD pin at TFP410 please?

    Regards,

    Aldo

  • Hello Aldo,

    I've removed the video DAC; still no signal on the HDMI output. 

    The /PD pin is initially low (because at the power up the CPU module doesn't generate video for a while), then switches to 3.3V.

    I've attached the oscilloscope screenshot;blue trace: IDCK+, yellow trace: one of the DATA signals, both referenced to GND. This is from yesterday, when the DAC was still connected. The signals are quite "round" probably because of the oscilloscope limited bandwidth (as I've written earlier, it's a 200 MHz - 2 GSPS model).

    F0013TEK.TIF
  • Hello Larry,

    I have reviewed your schematic again and notice something. Vref is connected to V3_3_TFPTX. Although, theoretically there is no problem in this configuration, in practice there is a problem. Because the signal switching on the data inputs, V3_3_TFPTX could get noise and the  TFP410 behavior could be unexpected. 

    Regards,

    Aldo

  • I suggest connect Vref directly to V3_3.

    Regards,

    Aldo

  • Hello Aldo,

    As I suspected it turned out it was a very silly mistake: there was a microscopic solder bridge (not visible even with the microscope!) between pin 19 and pin 20, so the TFADJ signal was forced to GND. The other day when I measured the voltages on all the pins I've noticed this, but I thought it was some kind of current-controlled input and that it was normal it was pulled to GND.

    Now I can see activity on all the HDMI outputs, and the monitor detects something (it exits from standby), but I still cannot see any image. But this is probably related to the loom, so for now I will mark this thread as solved, then if I will discover something related to the TFP410 I will create a new one.

    Thank you for all your support! I'm sorry I've wasted our time, both yours and mine. :-)

    Regards, L.