DP83822I: DP83822I

Hi Alexandr,

Have you tried enabling FX operation through bootstrap?
Can you please send me a register dump from 0x0 to 0x1F?
Please also include register 0x467 and 0x468. Those two registers require extended register access, outlined in the datasheet.
Can you send me a schematic?

Hello Ross!

Registers

ADDR	DEC	HEX
0	8192	2000
1	30793	7849
2	8192	2000
3	41536	A240
4	481	1E1
5	0	0
6	4	4
7	8193	2001
8	0	0
9	0	0
A	16384	4000
B	4096	1000
C	0	0
D	0	0
E	0	0
F	0	0
10	0	0
11	267	10B
12	32	20
13	0	0
14	0	0
15	0	0
16	256	100
17	544	220
18	1024	400
19	32801	8021
1A	0	0
1B	125	7D
1C	1518	5EE
1D	0	0
1E	2	2
1F	0	0
0x467	36812	8FCC
0x468	8193	2001

Yes FX enabling through bootstrap resistor 6.2k to 3v3 on pin 29 (COL)

I will send the schematic later.

Thank you!

Alexandr.

Hi Alexandr,

Sorry for the delay. Have you connected pin #24 when you enable FX operation?
From the schematic, it looks to be floating. If RX_ER is left to default, SD_EN is enabled and LED_1 (pin 24) becomes FX signal detect.

Hello Ross! :)

damp is In aatacment file 

Are the registers correct?

still need bootstrup resistors on the pins?registers.xlsx

Thank you!

Alexandr

Thank you Alexandr.
Can you check LED_1 function that I mentioned above?

Hello, Ross!

We checked the LED_1. It is always 0 state.

But LED_0 is 1 when optic cable is connected and 0 when it disconnected

Is the 25MHz correct tact signal? or 50 MHz?

Which mode is better to use RGMII or RMII?

Maybe there is something wrong?

1. REG_BMCR: BMCR_RESET (0x00, 0x8000)

2. REG_PHYRCR: DIGITAL_RESTART (0x1f, 0x4000)

3. REG_BMCR: BMCR_SPEED_SEL (0x00, 0x2000)

4. REG_CR2: CR2_100BFX_EN (0x0a, 0x4000)

5. PHY_REG_RCSR: RCSR_RGMII_MODE | RCSR_RMII_MODE (0x17, 0x0120)

Have a good weekend!

Alexandr.

Hi Alexandr,

RGMII and RMII should both work.
Since your clock source is 25MHz, you can operate in either RGMII or RMII master mode.

Could you put the PHY into reverse loopback and see if the data you send the PHY over optical is returned?
Please set register 0x16 to value 0x0110 to enable reverse loopback.

Hello Ross!

0x0016 BIST Control Register (BISCR), BIT 4:0

0x0016 <- 0x0101 (00001 = PCS Input Loopback)
0x0016 <- 0x0102 (00010 = PCS Output Loopback)
0x0016 <- 0x0104 (00100 = Digital Loopback)
Loopback work, no link.


0x0016 <- 0x0108 (01000 = Analog Loopback (requires 100-Ω termination))
Loopback no work, link enable.


0x0016 <- 0x0110 (Far-end Loopback, 10000 = Reverse Loopback)
Loopback work, link enable.

for the last example shows printsсrin sniffer

where to look for the problem?

Alexandr.