• State
  • Locked Locked
  • Replies 4 replies
  • Subscribers 78 subscribers
  • Views 2061 views
  • Users 0 members are here
Support feedback
Options
Options
Similar topics

This thread has been locked.

If you have a related question, please click the "Ask a related question" button in the top right corner. The newly created question will be automatically linked to this question.

msp430f5659: ADC ISR routine not working

harish yadav
Intellectual 490 points
Part Number: MSP430F5659

hello,

I am usinf msp430f5659 and trying to interface adc on pin p6.2. I have intialized adc but it is not converting anlog voltage. I have maximum voltage of 3.3 on p6.2. I have 4MHz smclk. It is not entering into ISR. Please help me to find the problem.

My code is:

void adc_configure()
{
    P6SEL |= BIT2;                                    // selecting bit0 as analog input pin
    ADC12CTL0 &= ~ ADC12ENC;
      REFCTL0 &= ~REFMSTR;                      // Reset REFMSTR to hand over control to
                                                // ADC12_A ref control registers
    ADC12CTL0 |= ADC12ON + ADC12SHT0_12 + ADC12MSC + ADC12REFON + ADC12REF2_5V;    // To on ADC10,Reference on, 1024 ADC12CLK cycles
    ADC12CTL1 |= ADC12DIV_7 + ADC12SSEL_3;    // ADC12SC sample and hold source, Stright binary format, /8 clock divider, clk source= SMCLK, Single channel signal conversion, no operation is active
    ADC12CTL2 |= ADC12RES_1 +  ADC12PDIV;          //ADC12_A resolution 10 bit (11 clock cycle conversion time), ADC12_A predivider/4
    ADC12MCTL0 = ADC12SREF_1 + ADC12INCH_2;        //selected ref = vcc and vss, selected channel= A2
    ADC12IE |= ADC12IE0 ;                                 // ADC_IFG upon conv result-ADCMEMO
    ADC12CTL0 |= ADC12ENC;                         // To start sample and conversion, to enable ADC12
    __bis_SR_register(GIE);
}

#pragma vector= ADC12_VECTOR
__interrupt void ADC12_ISR(void)
{
   while (!(ADC12IFG & BIT0));
     __bic_SR_register_on_exit(CPUOFF);
}

this is in my main function :

ADC12CTL0 |= ADC12SC + ADC12ENC ;           // To start sample and conversion, to enable ADC10

adc12_value = (float)ADC12MEM0;
sprintf(string,"%3.2f",adc12_value);

  • 0
    TI__Genius 9570 points
    harish yadav,

    P6.2 is Channel A2. So you need to enable ADC12IE2 and read ADC12MEM2. And check (ADC12IFG & BIT2) as well.

    Regards,
    Ling
  • 0 in reply to Ling Zhu2
    Intellectual 490 points
    I tried this also but it is not working. I found that it is not entering into the Interrupt service routine.
  • 0 in reply to harish yadav
    TI__Genius 9570 points 
    #include <msp430.h>

volatile unsigned int results;           // Needs to be global in this example

int main(void)
{
  WDTCTL = WDTPW+WDTHOLD;                   // Stop watchdog timer
  P6SEL = BIT2;                             // Enable A/D channel inputs
  REFCTL0 &= ~REFMSTR;                      // Reset REFMSTR to hand over control to
                                            // ADC12_A ref control registers
  ADC12CTL0 = ADC12ON+ADC12SHT02+ADC12REFON+ADC12REF2_5V;
  ADC12CTL1 = ADC12SHP;                     // Use sampling timer
  ADC12MCTL0 = ADC12SREF_1 + ADC12INCH_2;   // Vr+=Vref+ and Vr-=AVss, channel = A2
  ADC12IE = BIT0;                           // Enable ADC12IFG.0
  ADC12CTL0 |= ADC12ENC;                    // Enable conversions

  while(1)
  {
    ADC12CTL0 |= ADC12SC;
    __bis_SR_register(LPM0_bits + GIE);     // Enter LPM0, Enable interrupts
    __no_operation();                       // For debugger    
  }
}

#if defined(__TI_COMPILER_VERSION__) || defined(__IAR_SYSTEMS_ICC__)
#pragma vector=ADC12_VECTOR
__interrupt void ADC12ISR (void)
#elif defined(__GNUC__)
void __attribute__ ((interrupt(ADC12_VECTOR))) ADC12ISR (void)
#else
#error Compiler not supported!
#endif
{
    switch(__even_in_range(ADC12IV,34))
  {
  case  0: break;                           // Vector  0:  No interrupt
  case  2: break;                           // Vector  2:  ADC overflow
  case  4: break;                           // Vector  4:  ADC timing overflow
  case  6:                                  // Vector  6:  ADC12IFG0
      results = ADC12MEM0;               // Move results, IFG is cleared
      __bic_SR_register_on_exit(LPM0_bits); // Exit active CPU, SET BREAKPOINT HERE
  break;
  case  8: break;                           // Vector  8:  ADC12IFG1
  case 10: break;                           // Vector 10:  ADC12IFG2
  case 12: break;                           // Vector 12:  ADC12IFG3

  case 14: break;                           // Vector 14:  ADC12IFG4
  case 16: break;                           // Vector 16:  ADC12IFG5
  case 18: break;                           // Vector 18:  ADC12IFG6
  case 20: break;                           // Vector 20:  ADC12IFG7
  case 22: break;                           // Vector 22:  ADC12IFG8
  case 24: break;                           // Vector 24:  ADC12IFG9
  case 26: break;                           // Vector 26:  ADC12IFG10
  case 28: break;                           // Vector 28:  ADC12IFG11
  case 30: break;                           // Vector 30:  ADC12IFG12
  case 32: break;                           // Vector 32:  ADC12IFG13
  case 34: break;                           // Vector 34:  ADC12IFG14
  default: break; 
  }
}

  • 0 in reply to harish yadav
    TI__Genius 9570 points
    Hi harish yadav,

    Have you solved the problem?

    Regards,
    Ling

**Attention** This is a public forum