Part Number: LMK03000 HI,
In the past I asked you about the BIAS pin of the LMK03000 family (Case CS0429711). In the datasheet it is written that it should be tied to VCC through a 1uF capacitor.
I tied it by mistake to GND through a 1uF capacitor…
Part Number: LMK03000 Other Parts Discussed in Thread: LMK03033 , , LMK01000 Hello,
We are using 5 LMK03033 to fan out a clock to 16 ADC chips and 4 FPGAs. The architecture is like this:
source > LMK #1 > LMK #2 > ADC (4x) + FPGA
> LMK #3 > ADC…
Part Number: LMK03000 Hello, My customer would like to know Period Jitter spec of CLKout since their receiver device specified its required periodic jitter spec. How much would it be at LMK03000C CLKout? Best regards, K.Hirano
Part Number: LMK03000 Good morning,
I am looking at using the LMK03000 as a free running master clock generator or slave locked to master clock.
In slave mode the OSCin will be 1.6MHz or 2 MHz. What OSCin freq. should I program?
Data sheet states…
Part Number: LMK03000 Hi,
Is it possible to input 10MHz to OSCin with a single end? According to the data sheet "Figure 8-14. Recommended OSCin Power for Operation with a Sine Wave Input", the single-ended input seems to be above 50MHz.
If it can…
Part Number: LMK03000 Hi,
The EVM works fine with the attached file settings, but the customer's board has an unstable PLL lock and outputs a slightly higher frequency (all 5 prototype PCBs are the same).
LMK03000設定キャプチャ.xlsx
I monitored the R and…
Part Number: LMK03000 Hi Team, Our customer shorted the BIAS pin to GND with a bypass capacitor and found that this pin should be connected to VCC. Since the datasheet has limited information for bias pin, is there a longer effect in device performance…
Part Number: LMK03000 Hi,
Customer is using LMK03000C. Could you let me know the jitter information of distribution path, please?
Customer uses the phase synchronization by SYNC pin. They want to rise SYNC signal with accurate timing.
Best regards…
Part Number: LMK03000 Hi,
Additive RMS Jitter of clock distribution section is showed in datasheet. Is this Additive RMS Jitter value include VCO divider?
Best regards, Shimizu
Arvind
The design I was asking about took a few turns since I asked the above questions. Here's how we use the LMK03200, basically I have found we don't need 0-delay mode we just need to Synchronize two output channels very closely, to better than 5ps…
