Part Number: LMK04616 Hi all, I attach the TICSpro log data below. This is the log data after loading tcs file. You can see that PLL1 RDIV reset and PLL1 NDIV reset is run a few time. Is this step necessary?
When CLKIN is instability I set PLL1 register,…
Part Number: LMK04616 Hi all,
I would like to know about the position of 100 ohm terminate in HSDS => LVDS conversion output. Datasheet P.32 HSDS section, the 100 ohm termination is situated at at Rx side from AC capling capacitor.
However the RFIC…
Part Number: LMK04616 Other Parts Discussed in Thread: LMK04610 Hi,
I need to distribute twelve device clock and SYSREF signals in my system (to DACs, ADCs and FPGA).
The part with the highest count of clock outputs i saw is the LMK04616 which has sixteen…
Part Number: LMK04616 Hello
I'm considering using the device for multi-stage clocking architecture utilizing several of these devices while the last stage will need to drive all 16 outputs independently (and perhaps differently configured frequencies…
Part Number: LMK04616 Hello
The HSDS outputs can drive the AC-coupled LVDS load as per Section 9.3.2.2 of the datasheet, while being configured for 4mA or 6mA current drive.
With 100 Ohm diff termination, taking 4mA, makes 0.4V diff voltage span at the…
Hi,
LMK04616 datasheet shows the block diagram for the PLL1 only use case, where PLL2 is bypassed and output comes from PLL1.
You can configure the PLL through TICS Pro while selecting the operating mode for single loop PLL1, it will set the registers…
Part Number: LMK04228 Other Parts Discussed in Thread: CDCLVP1102 , LMK04610 , LMK04616
I am trying to get 38.4Mhz as input and make 38.4Mhz as two outputs. i will make just repeater
However, the frequency that can be made using TICS PRO is 38.4615384615Mhz…
Guenther,
When you say you wish to replace with an external voltage-controlled oscillator, is this intended to fulfill the same role as the VCXO? Just making sure: PLL1 supports external VCO (usually a VCXO), and you're not trying to use an external VCO…
Hi Paul,
Indeed, LMK04610 and LMK04616 still exhibit this wander in current silicon PLL1, and there is no workaround as this is somewhat fundamental to the semi-digital PLL architecture. While the architecture did what we wanted it to do in most cases…