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Showing 28 results View by: Thread Post Sort by
    Answered
  • LMK1D1208: 1/f noise

    Andre Burkard
    Andre Burkard
    Resolved
    Part Number: LMK1D1208 Hi, are there any additional information about the phase noise below 1kHz? Can It be assumed, that the Phase noise transits to 1/f noise below 1kHz? Thank you.
    • Resolved
    • over 3 years ago
    • Clock & timing
    • Clock & timing forum
  • LMK1D1208: Duty cycle

    Hugh Yang
    Hugh Yang
    TI Thinks Resolved
    Part Number: LMK1D1208 Hi Teams, Recently, I am working with my customer to qualify lmk1d1024/8. 1) Customer wanna use its IN1 multiples lvds signal from fpga. The f of input is 200kHz and the duty cycle is 0.2%. I am not sure if it’s proper. I have…
    • over 3 years ago
    • Clock & timing
    • Clock & timing forum
  • LMK1D1208: Output state

    May
    May
    TI Thinks Resolved
    Part Number: LMK1D1208 Hi, In the 8.3.1 Fail-Safe Input and Hysteresis, it states that "The device also incorporates an input hysteresis which prevents random oscillation in absence of an input signal. Furthermore, this feature allows the input pins…
    • over 4 years ago
    • Clock & timing
    • Clock & timing forum
  • Answered
  • LMK1D1208: Recommended unused LVDS input termination

    Kazuhiko Hirano
    Kazuhiko Hirano
    Resolved
    Part Number: LMK1D1208 Other Parts Discussed in Thread: CDCLVD1208 , Hello, My customer would like to use either LMK1D1208 or CDCLVD1208. They plans to use it as 1 (IN1_P/IN1_N at LMK1D1208, INP1/INN1 at CDCLVD1208) to 8 LVDS in/out buffer. They would…
    • Resolved
    • over 4 years ago
    • Clock & timing
    • Clock & timing forum
  • LMK1D2102: EN pin clarification

    JC
    JC
    Part Number: LMK1D2102 Other Parts Discussed in Thread: LMK1D1208 Tool/software: Hi there, LMK1D2102 datasheet table 9-1 "Output Control Table" states that when EN is 0: Clock Outputs All outputs disabled (static "0") Is this saying that literally…
    • 9 months ago
    • Clock & timing
    • Clock & timing forum
  • Answered
  • CDCLVP1102: Differential Input Voltage Specification

    Gary Stein
    Gary Stein
    Resolved
    Part Number: CDCLVP1102 Other Parts Discussed in Thread: LMK1D1208 Tool/software: The CDCLVP1102 datasheet lists maximum Differential input peak-peak voltage as 1.5V. Figure 14 shows a DC-coupled LVCMOS as an input to INP, with INN biased to 1/2 of…
    • Resolved
    • over 1 year ago
    • Clock & timing
    • Clock & timing forum
  • Answered
  • LMK1D1204P: recommended schematic for VDD pin, OE0/1/2/3 pins, VAC_REF0 pin and VAC_REF1 pin

    Noriyuki Takahashi
    Noriyuki Takahashi
    Resolved
    Part Number: LMK1D1204P Other Parts Discussed in Thread: LMK1D1208EVM , , LMK1D1208 Tool/software: Hi team, Could you describe the recommended schematic for VDD pin, OE0/1/2/3 pins, VAC_REF0 pin and VAC_REF1 pin? It seem there are no any recommended…
    • Resolved
    • 4 months ago
    • Clock & timing
    • Clock & timing forum
  • Answered
  • LMK1D2104: Disabled Current Draw

    IDK
    IDK
    Resolved
    Part Number: LMK1D2104 Other Parts Discussed in Thread: LMK1D1208 Tool/software: Hello, How much current does the LMK1D2104 draw when all outputs are disabled using the EN pin? This does not seem to be listed in the datasheet. Thanks, Matthew
    • Resolved
    • over 1 year ago
    • Clock & timing
    • Clock & timing forum
  • Answered
  • LMK1D1204: Power Supply Characteristics of LMK1D120x

    Matthew Bavier
    Matthew Bavier
    Resolved
    Part Number: LMK1D1204 Other Parts Discussed in Thread: LMK1D1208 Hi, In the datasheet for the LMK1D120x family of devices, there is the current consumption vs frequency graph of the LMK1D1208 and I saw the comment that the LMK1D1204 follows a similar…
    • Resolved
    • over 2 years ago
    • Clock & timing
    • Clock & timing forum
  • Answered
  • LMK1D2108: Wrong pin numbering in datasheet

    Tom Van Uffelen
    Tom Van Uffelen
    Resolved
    Part Number: LMK1D2108 Other Parts Discussed in Thread: LMK1D1208 I'm using the LMK1D1208 as LVDS buffer in my design. I'm measuring on the hardware and noticed that the 8 outputs coming from IN0 are giving the inverted logic level. When a logic '1' is…
    • Resolved
    • over 2 years ago
    • Clock & timing
    • Clock & timing forum
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