Part Number: SN74ALVCH16245 why is it not redommended to use pullup and pulldown registors?
I recognize bus hold circuit as a circuit as shown in the figure 1.
Is it omitted in the logic diagram?(figure 2)
figure.pdf
Part Number: SN74ALVCH16245 I am working on an application that needs to disable outputs when a Hi-z state is entered. I chose this part because we care about having a minimum propagation delay for timing purposes, but this part has bus-hold circuitry…
Other Parts Discussed in Thread: SN74ALVCH16245 I want use the SN74ALVCH16245 to transform the data which the rate is 150Mbps, is it correctly?
I want get the maxium data rate from the datasheet, but I did not find it. Please tell me which parameter…
What you have here is a very old device (pre-1995). The bottom-side markings are likely from different manufacturing sites, however the ALVC16245 is no longer produced by TI. It now goes under the name SN74ALVCH16245.
- For Q1: See pg. 16 of the attached .pdf.
- For Q2: Perhaps a technician drags a scope ground probe across the board or the output goes to a connector. Its alway good form to provide at least minimal "short to GND" protection at connector I/O.
This device is an LVC family device. Fig. 15 in the attached document shows the V/I output characteristics. Termination methods are also described in this document and for series back termination, the series resistor value should match the characteristic…
Hi Jacky, if the input voltage rises or falls too slowly, the gate output can oscillate:
If your rise and fall times exceed the limits of datasheet, use a gate with Schmitt trigger inputs.
See also here:
scba010.pdf
And here:
slla364a.pdf…
