Hi Mukul-san, Tom-san,
Sorry for the additional questions. Please let me confirm the following information.
(4): If you have a reference design for the layer structure and pattern routing when using 3 units of DDR3 in 8 layers, could you please share it…
You may be interested in looking at C55x, C66x, or K2G processors. TI provides reference designs here: TI Reference Designs Library
From a quick search, I found these reference designs that might be interesting. Feel free to run your own…
You might check if below pointers will be in help.
http://www.ti.com/tool/TIDEP0036 - Reference Design using TMS320C6657 to Implement Efficient OPUS Codec Solution
See also below e2e threads:
Thank you for your time looking into my question.
I am doing the works on my custom DSP board. I currently don't have an CDCD62005 EVM to test.
To give you some more background, I am designing a custom DSP board based on the EVM: http:…
If you are referring to http://www.ti.com/tool/tidep0036 , "Reference Design using TMS320C6657 to Implement Efficient OPUS Codec Solution":
- We have K2H cards running full Ubuntu 14.04 system on A15, so it contains arm gcc compiler