INA823: Non Linear behavior for large signal

Hi Caspar,

will not work without negative supply voltage:

caspar_ina823.TSC

Kai

Hi Caspar,

Problem: Vout show excessive non linearity when Vin[diff]>133mv [vout>798], gain slope changes 

I duplicated the anomaly as shown in Kai's simulation and your comments. Let me check with the modeling engineer and see if there are any modeling issues with low single supply voltage rail. For now, you may try Kai's suggestion to get the linearity of the simulation.  I will get it back to you. 

Best,

Raymond

Hi Kai, Thanks for the feedback. I was aware that using a negative supply fixed the issue. my main concern is whether this is just a model artifact or a true representation of the devices behavior.

Hi Raymond, thanks. really need to understand if the 'hardware' has the same behavior..? and if there is anything in the data sheet that precludes anything in my setup. Thanks

Hi Caspar,

in any case, without negative supply voltage your output voltage cannot come closer to signal ground than about 120mV:

So the circuit will never be able to handle differential input voltages down to zero Volts without a negative supply voltage.

Kai

Thanks Kai,

i think the problem is more fundamental. Setting Vref to 1v [ie pedestal] to remove output drive effects but there is still a massive discontinuity in Vout

supply voltage 3.3

input common mode voltage = 1v

Vref =1V

Rg=20K => Av=6

differential signal ramp from 0 --> 0.4v

Hi Casper,

if the input stage of INA823 is going into saturation because the negative supply voltage is missing, then applying any Vref cannot cure the malfunction.

Kai

Hi Kai,

1. applying  vref was to demonstrate that its not an issue with the output stage. [ie put in closer to the middle of the diagram 7.55/7.56]

2. the device is capable of single sided operation according to the datasheet.

The main issues are:

* is the model representative  of actual device operation? 

* am i expecting the device to operate out side a parameter as per the data sheet? and if so which parameter?

I am evaluating a number of parts and have not encountered this behavior in any other the other parts in [...simulation...] identical test fixtures.

Hi Caspar,

such a kink can be seen, if the input stage goes into saturation. Here simulated by VEEE:

caspar_ina823_1.TSC

Kai

Hi Caspar,

Thanks for Kai and Marek's simulations, comments and discussion!

The modeling engineer will fix the anomaly, and will update the model. Please use  the dual supply voltage rails for now per your simulation. 

I do not have a revision schedule yet, but we will try to get it resolved soon. 

Best,

Raymond

Hi Raymond, Thanks for the feedback, I am reading this as confirmation that the issue is only with the simulation model and not a 'silicon' problem can you confirm?  

Thanks,

Caspar.

Hi Raymond,

Thanks, I am reassured, i'll try some hardware!

Caspar.

And report on your results

Kai