Other Parts Discussed in Thread: , OPA2206, OPA206, OPA2310, TLV9154
Could inverting/ no-inverting input be high impedance when VCC not powered? Thanks.
This thread has been locked.
If you have a related question, please click the "Ask a related question" button in the top right corner. The newly created question will be automatically linked to this question.
There is no built-in current limit.
Using external current-limiting resistors is possible, and will prevent damage to the opamp. However, the remaining current flows into VCC+ and might partially power up the TL074 and any other devices connected to this supply.
The only general-purpose opamp that the website lists as having overvoltage protection is the OPA206/OPA2206. But there are many instrumentation amplifiers with overvoltage protection.
Additionally you may want to explore some shutdown versions of op amps. The function is slightly different than high impedance when not powered, but if there is power applied and shutdown is active your inputs and outputs are high impedance. I've provided a list of all our quad amplifiers with shutdown.
Hi Clemens & Jerry,
Thanks for your recommendation. My initial idea was to find a device which does not have the clamping diode from input to VCC, but preserve the similar VCC,GBW, offset....specs. I think some amps have a high input impedance when not powered.
The input bias current of CMOS op-amps actually is the leakage current through the gate isolation and the ESD protection circuits. So when powered and shut down, the input pins have the same high impedance as when active. (IB is ±10 pA for the TLV9154; at 16 V, this corresponds to 1.6 TΩ.)
Thanks for your reply.
1. So for CMOS op-amps, when VCC not powered, the input has high impedance as well? Could there be clamping diode from input to VCC? Just want to check if a CMOS op-amp w/o OVP would be fit for this application.
2. What's the difference of clamping diode and ESD protection circuits?
3. How can I know if there is a clamping diode in the op-amps?
1. Most opamps (CMOS or others) have clamping diodes to VCC. The low input bias current is what allows CMOS opamps to have a power-saving mode without having to disconnect the inputs.
2. The purpose of the clamping diodes is to protect against ESD.
3. When there are clamping diodes, the absolute maximum ratings say that the input voltage must not excced VCC + 0.? V. Opamp with OVP would allow higher voltages.
to believe that everything is fine only because the input impedance is very high and no current can flow is not a good approach. The higher ohmic the input, the easier to destroy it by ESD or any other overvoltage.
The usual way to handle this is to use an external diode clamp to the supply rails and to limit the current through the diode clamp by a suited series resistor. With a 10k resistor and a 10V input voltage only 1mA is flowing through the diode clamp into the rails which can easily be absorbed by the TL074 itself because it draws a supply current of 5.6mA totally. So the supply voltage will only rise to about 1...2V until the TL074 starts to draw 1mA.
And ESD which runs through the 10k resistor and the diode clamp onto the supply rails is usually absorbed by the decoupling caps of TL074.
The input pins will be high impedance when the part is in shutdown, but you are still not able to exceed the Vcc of the op amp. This will then forward bias the diodes to V+.
Shutdown was proposed as an alternative approach if you want an input signal but no output while the supply is still present.