OPA328: How to design sampling circuit when the input has high common mode noise?

Brian Li

Part Number: OPA328

Hi team,

Could you please help check if we have application note or other papers to recommend how to design sampling circuit when the input sometimes has high common mode noise? (Only in very few situation have this noise)

Thanks,

Brian

9 months ago

+1 Marek Lis 9 months ago

TI__Guru 60610 points

Hi Brian,

For sampling circuits, the common mode noise may be suppressed by using a common mode choke coil and capacitor (line bypass capacitor or Y-capacitor) installed between each line and the metallic casing. Below please find few articles discussing the ways to minimize the common-mode noise:

https://ieeexplore.ieee.org/document/8341371

https://www.academyofemc.com/post/inductors-in-emc-part-3-common-mode-noise-filteringhttps://www.osti.gov/servlets/purl/1468919

https://www.osti.gov/servlets/purl/1468919

https://electronics360.globalspec.com/article/11877/electrical-noise-suppression-and-common-mode-choke

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OPA328: How to design sampling circuit when the input has high common mode noise?