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LMH7220: Request for getting spice model

Part Number: LMH7220
Other Parts Discussed in Thread: TLV3604

Hi, 

I would like to utilise LMH7220 in my design based on specifications mentioned in its datasheet. For design validation, I require the spice model of the same. Request you to please share it with me.

Thanks in advance.

  • Hi Kritika, 

    We do not have a spice model for LMH7220 at the moment.  However, we do have a model for TLV3604/5, our newer generation LVDS device. Would you be interested in using this device instead? 

  • Hi Chi,

    Thanks for replying. Actually I am looking for a LVDS comparator with lowest possible quiescent current to avoid heating problems. As per my understanding of the datasheet LMH7220 has lower quiescent current of 6.8mA compared to 12.1mA for TLV3604/5. Please confirm. If so it would be preferable for me to opt for LMH7220. 

  • Understood Kritika. Was able to quickly create the LMH7220 model for you anyways! See attached. Let me know  if you see any issues. 

    0576.LMH7220.zip

  • Thank you very much. Will let you know if any problem is encountered. 

  • Hi Chi,

    I am facing an issue with the spice model provided by you. I am trying to convert current to voltage and then convert it to LVDS format through this comparator, but when I am increasing the current while simulating, the behaviour of the device deviates from what is expected. Instead of showing high for the positive voltage, it throws a small pulse when there is voltage level transition and shows 0 or constant -ve waveform during the time of high voltage. I am using LTspice for simulation purpose. Please guide on how to fix this.

    Thanks and Regards,

    Kritika

  • Hi Kritika,

    Are you somehow violating the input voltage range OR VCC range? For our LVDS models, I have the outputs go to VEE when this violation occurs. IPlease make sure the inputs or vcc is within the recommended operating range. 

  • No, VCC is set as 5V, hence well within the prescribed limits. Also, I observed that the pin numbers for the model provided do not match with the datasheet, for e.g. PIN 1 in the model is defined as IN+ but as per connection diagram in datasheet IN+ is PIN 6. Are you sure correct definitions are provided for the pins in the model? If not the case, can you please suggest any other reasons for the misbehaviour? 

  • Hi Kritika, can you send me a picture for your schematic? Our models are optimized for pspice and tina so I have seen some issues when importing to ltspice. But i can take a look at whats going on anyways