Hello,
We have a circuit with these functional block:
1. Differential analog front end - basically a high input impedance diff amp with high decimation and CMRR
2. Anti-alias filter
3. ADC input driver
To achieve the desired common-mode performance, the differential front-end significantly decimates the measured signal(/1000). As a result I need to include gain(*25) somewhere in downstream circuits to scale the signal for full-scale input to the adc.
In the past we’ve used a unity gain amplifier of sufficient BW with a charge-bucket to drive the input of the SAR ADC per TI recommendations in app notes.
What is the best amplifier block in this configuration to include the gain of 25 needed for this design? Should we add to the anti-alias filter (two stage 3rd order Bessel filter), so each stage is set to a gain of 5. Or would it be better to design the anti-alias filter with unity gain and have the 25x gain into the non-inverting stage being used to drive the SAR.
I can share a schematic offline.
Thank you very much, Keith
