INA220: Parameters of INA220A

Hello Naveen,

When you say switched capacitance of an analog input, it makes me think of the front end of a SAR ADC that has a switched capacitor for sample and hold measurements. If this is what you are implying, then it does not apply to the INA220 as it is not a SAR architecture but rather a delta sigma architecture.

For the input resistance and analog input path resistance, can you clarify what you mean and what you hope to achieve with that information? I presume your customer is thinking he can modify the gain with an external resistor that is assumed to be simply in series with one of the gain setting resistors of the internal amplifier. Typically that is not advised for any of our devices as those with a front end difference amplifier have their resistors trimmed ratio metrically with the ratio having low tolerance while the individual resistor might have a tolerance of 15 to 30%. In addition to the high tolerance in the resistors, our parts typically also have a front end common mode sense circuit which means there is another circuit branch that feeds into the node between the external resistor and the internal gain setting resistor. These two items typically complicate a simple modification of gain and we will therefore typically provide a gain error equation when relevant. However, for this part we don’t provide that equation, because the front end is not a difference amplifier but rather a delta sigma ADC.
The PGA setting of the INA220 corresponds to the number of bits used in the ADC register. The LSB of the INA220 is ~10uV for all PGA settings. In the datasheet table PGA = /8 corresponds to 15 data bits and 1 sign bit. Each subsequently smaller Full-scale current sense (input) voltage range has one less data bit or a smaller MSB.
For example:
PGA = /8, 15 bits used : 0.320V/(2^15)=~10uV
PGA = /4, 14 bits used : 0.160V/(2^14)=~10uV
PGA = /2, 13 bits used : 0.080V/(2^13)=~10uV
PGA = /2, 12 bits used : 0.040V/(2^12)=~10uV

The gain error over temperature is 1 m%/ᵒC. The calibration procedure provided in the datasheet modifies the output scale.

The CSA input bias current oddly place under the IN+ and IN- pin input impedance specification of the datasheet. Here both input bias currents are typically around 20uA. Defining input offset current as (IB+)-(IB-) therefore yields 20uA-20uA = 0. While it is probably not 0, its still something comparatively much smaller.

With respect to the settling time, it depends upon the accuracy you want to have. 9-12 bits of accuracy ranges from 84 to 532us and these values can be found in the electrical characteristics section of the datasheet. Each extra bit of accuracy corresponds to an order of 2 averaged conversions. For instance 13 bits corresponds to 2 conversions, 14 bits corresponds to 4 conversions, and 15 bits corresponds to 8 conversions. The remaining averaging options are for removing noise that may be present in the system.