INA818: Considerations for the input/output filter.

Hi SrgiO,

what is your signal frequency range? The datasheet of gauge often specifies the bandwidth and settling time.

And the datasheet of ADC usually specifies the component values of necessary charge kickback filter.

Kai

Thank you Kai!

Hi SrgiO,

Happy to help. In addition to Kai's questions, can you also provide the gauge and ADC part number?

Hi Tamara and Kai, thank you both very much.

I don't have any defined, I mean the theoretical aspects to be able to apply to any gauge and ADC.

If you wish, we can propose an example, but I can't find the data that Kai asks for. I've been looking at HBM, RS Pro, Omega .... and the gauge's frequency range is not mentioned in the datasheets. The measurements are in DC according to the scheme that I proposed.

For the ADC, I was thinking of using an MSP430 Launchpad or Arduino, for example. But once again, I do not know what aspects are influencing, in this case, for the INA output RC filter.

Thank you!

In order to better position ourselves, I add the following screenshots.

This is specifically the configuration at the exit of the INA proposed in the schematic included in the tidub00 documentation from Texas.
It's really necessary? Why these values and not others? How to adapt it to each INA and ADC?

In other schematics I have found that the resistance in series with the output is put after the RC parallel. Is it similar to the previous one? Does it change something?

Thank you!

Hi SrgiO,

Ri stands for a typical load.

C1 in parallel to Ri is a no-go. 100nF is far too much load capacitance to be directly connected to the output of INA818. If you intend to connect a capacitive load, then do it as shown in the upper scheme with an isolation resistor of R8 = 47...100R or more, if the circuit allows.

By the way, do you know this appnote?

slaa045.pdf

Kai

Thank you for sharing that app note, Kai!

Hi SrgiO,

Kai is correct. Ri is just the typical load. I would not recommend hanging a large capacitor off the output like that, unless there is an isolation resistor. A large capacitor at the output may lead to significant stability issues. Have you seen our TI Precision Labs training videos on op amps? We have a chapter on stability: https://training.ti.com/ti-precision-labs-op-amps-stability-introduction?context=1139747-1139745-14685-1138805-13848

Hi Tamara and Kai,
I have been the time that I have been able to see the interesting information that you have sent me.
Once again I thank you for helping me to increase my electronic knowledge. It is very good information!

So any resistive or capacitive load suppose a risk to stability or loss of precision.
Is Ri then a load that imposes the ADC?
that is, Ri is not a resistance that must be "soldered" at the INA exit, is it? Therefore, is it better not to put any component if it is going to be connected to an ADC?

Thank you!

Hi SrgiO,

I think you can omit the charge kick back filter. Just use a simple isolation resistor, R8 = 100R...220R:

Kai

Thanks for sharing, Kai!

Woohoo!

First of all, thank you very much for the responses. For real! It feels like I'm learning a lot more here than when I was in college. :-)

1.- Firstly: "I think you can omit the charge kick back filter."
Is this statement due to the fact that the kick-back circuit can be neglected because the setup time of the INA (12 - 60) us is equal to or slower than the maximum ADC speed of the MSP430C32x (12us at 1MHz)? Or is it for another reason?

2.- "Just use a simple isolation resistor, R8 = 100R ... 220R"
Based on the equation, wouldn't it be even better not to connect any R8? Since R8 + 2k must be as small as possible ... well... better than R8 = 0, right? 

3.- The data in the INA818 table is taken with an RL = 10k. Is it therefore necessary that I mount an RL = 10k on my circuit or is it better not to put it? Connecting the INA output directly to the ADC of the MSP, for example.

I am sorry if it sounds strange, or very silly, but it is that sometimes I do not understand when a resistance (R8 or RI In my first capture of previous schematics) is in the circuits "simulating a load" or it is really an essential component for it to work properly.

Many thanks.

I await your interesting responses!

Cheers!

Hi Srgio,

I would choose R8 = 100R and an ADCLK of let's say 500kHz. This gives you a sampling time of 24µs. 12µs will the INA818 need to settle to 0.01% and the remaining 12µs allows the "2.1k + 42p" RC-network to fully charge up.

There's no need to mount a resistor from the output of signal ground.

An isolation resistor in SERIES to the output IS necessary, if a relevant load capacitance needs be connected from the output to signal ground. But there's no need to mount a resistor from the output of signal ground. The only reason why a load resistance of 10k or 2k or else is given in the datasheet specifications or is "mounted" in the simulation is that the output voltage swing of OPAmp and some other performance data depend on the amount of this load resistance. For instance, no OPAmp can drive arbitrarily small load impedances. This would mean infinitely high output currents. See also figure 37 and 38 of datasheet.

Kai   

Thanks, Kai!

Hi SrgiO, let us know if this is resolved for you :)

Hi Kai and Tamara,
I'm sorry for the delay in answering. Believe me that I would have liked to answer you as soon as possible, but I have had different duties to attend to. Thank you very much for staying tuned.

Indeed Kai, the insulation resistance of 100 Ohm seems the ideal to put it on. I think that for this part, you have helped me to see it and I already have it clear.
On the other hand, it makes me put myself in the worst case:
Where settling time is 60us for 1000 Gain.
So in this case, with the same Rlim = 100Ohm it will give "2.1k + 42p" equally but now the ADCLK must be configured to be something more than 60us.

How much more will it be correct? Double at least?
120us => ADCLK = 100khz, right?

Once this is defined....I return to the subject of the differential input filter.... There is less left, that's good! :D
In one of the texas application notes the cutoff frequency is set at 15khz and the common frequency at 305kHz .... What or where are these values ​​regulated, why not others?

Thank you!!! I am really very happy on the day I decided to participate in the forum.

Cheers!

Hi SrgiO,

an ADCLK of 125kHz results in 96µs. This should be sufficient.

I will later respond to the input filter question.

Kai

Excellent answer as always Kai!
Thank you!

The functionality and design criteria for the input filter have now become very clear to me.

Now it remains to know one of the questions that I have always had ...

What is the typical design frequency to avoid FH EMIs?
Does it affect the same frequency in differential as in single-ended?

Thank you!

Hi SrgiO,

there's no simple answer. In fact it depends on many factors like bandwidth of INA, bridge resistance, imbalance of bridge, frequency spectrum and level of EMI, acceptable increase of noise, etc.

A good starting point is when your common mode filtering provides about 10...20dB dampening at the unity gain frequency of INA. Use very narrow tolerated filter components like +/-1% toleranced low drift caps (e.g. NP0) and +/-0.1% toleranced low drift thin film resistors. Keep in mind that the imbalance of bridge can totally ruin the balance of filter resistors! If your bridge imbalance is 100R and you take 1k filter resistors, then the effective resistor tolerance is awful 10%...

Kai 

Hi!
How's it going? I hope well with all of the pandemic ...

Well, I understand that it is difficult to give answers that are always valid for all circuits.
When I ask, I really look for "ways" or "design tips"
It seems good to me to start from the frequency with unit gain, it makes a lot of sense.

So, now if, particularizing for the INA818 as an example. The maximum frequency with unity gain is 2MHz.
Therefore, the equations that govern the design are:

So, setting the value of Rin to 1k Ohm and the fcm to 2MHz with an attenuation of 10dB at this frequency (you mean 10db at 2MHz or the typical -3db cutoff frequency at 2MHz. I have understood that -10dB better than 2MHz), you have a 238pF capacitor

So the differential capacitor according to the recommendations is 2.38nF

But now the frequency in differential mode is greatly reduced.
If for example it were a audio signal, the one I want to analyze would be limited to a 32kHz input signal, right?

Thank you very much!

Glad to read that everything is fine. :-)

Thank you very much for your answer!

You are welcome :-)

Kai