TLV320ADC3101: TLV320ADC3101IRGER

Can you please send me your schematic so that I can understand your setup?

Pls reference attach the SCH , thanks

ADC 3100 3101 SCH 2023.04.20.pdf

Is device ADC 3100?Schematic indicates this

Please remove capacitors from pin 8 and 11.

Please place 22 ohm series termination on MCLK,DOUT,BCLK and LRCK. Is device operated as a slave? please send me the details of your timing.

It looks that there are long connections on input signal paths.These need to be minimized

Please set up the board as single ended. Please a 2.2u  from pin 13 to ground very close to the IC pins. apply a sine wave of 1Khz 0.5v though 2.2u capacitor on pin 12.

Keep PGA Gain =0db

Check FFT.

the device ADC 3100 and ADC 3101 also has the FFT   Noise , so we will try your advise to debug ASAP , thanks lot,

OK.

we check base on your above the advise , the test result on attach file , see the FFT Noise  alway happen ON no signal in.

 ADC3101 FFT Noise Chect Base on TI Advise 20230504.xlsx

I am unable to open the file. Can you please re send?

Re-send ADC3101 FFT Noise Chect Base on TI Advise 20230504-1.pdfADC3101 FFT Noise Chect Base on TI Advise 20230504-2.pdf

the device operated as a slave mode, thanks

BTW : we do  keep  the ADC3101I all input PIN(6/7  8/11  12/13)  via the 10uF to GND , then also see the FFT Noise .

Generally we do SNR Measurements with a LPF and A-Weighing filter. This prevents noise in the higher frequencies from Appearing in signal Bandwidths. Do you have the opossibility to test using such a filter?