TLV320AIC3104-Q1: TLV320AIC3104-Q1 || Schematic || Review ||

Part Number: TLV320AIC3104-Q1
Other Parts Discussed in Thread: TLV320AIC3104

Tool/software:

Hi 

I  m using codec IC for ti. Below is design requirement which i done in our design.

1.  required external speaker for 1.4W (8ohm).

2. Required external mic 

3. Interface I2S.

Please review the attached Schematic.

Thanks 

Rahul Rai

tlv_codec.pdf

  • We are interface this Codec IC to I.MX 8M PLUS  processor.

  • Hi,

    I have a few notes from going through the schematic.

    You should separate digital and analog ground. DVDD, IOVDD, and DVSS should be connected to a digital ground plane, and AVDD, DRVDD, and microphone/speaker outputs can be connected to the analog ground plane. Then, you can connect the two ground planes with the "star grounding" technique, and place the connections in the center of the device to minimize noise. The layout example for separating the grounds is in figure 13-1 in the datasheet for the TLV320AIC3104. 

    Also, you probably want to add a capacitor between your RDOTner and the MIC2L/R inputs on the device. The device's inputs should be AC-coupled, which will not allow external DC offset from your tuner to be introduced into the microphone signal path. The microphone signal path has internal common mode biasing so adding a DC offset will affect the signal quality and potentially cause clipping issues. In the example schematic in the datasheet, they used .47uF capacitors, but you can choose the capacitor size based on your desired high pass cutoff frequency. Use the formula C > 1/(2*pi*R*f) where f is the cutoff frequency, you can choose 20Hz for audio rate, and R is the input resistance set by the PGA. You can find input resistance values in the datasheet.

    The voltage handling for AVDD and DVDD being different levels looks good, just make sure to separate analog and digital grounds. The connection to the amplifier seems correct. Let me know if you need any more help with this design.

    Best,
    Mir Jeffres

  • Hi

    what about IOVDD Voltage level? 3.3v is okay or 1.8vV??. Please suggest

    I am connecting i2s interface with im8m plus voltage 1.8V.

  • Hi,

    IOVDD should be okay at 3.3V, IOVDD can go up to 3.6V (with respect to DVSS). Check section 8.3 in the datasheet for these values. With an I2S input riding around 1.8V, this should be fine. The high level for digital input will be 0.7*IOVDD, and low level is 0.3*IOVDD. So, you can have a digital input ranging anywhere from .99-2.31V with no problems. Let me know if you need any more help.

    Best,
    Mir