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CDCM9102: How to reduce the |VOD| of LVPECL mode to 0.4Vp to 0.8Vp

toshi-e2e
Genius 4715 points
Part Number: CDCM9102

Hi all,

My customer plans to use CDCM9102 and plans to connect the LVPECL output to the processor's CLKIN with AC coupling. 
CDCM9102 |VOD| of LVPECL is between 0.6V and 1.23V.
However the VOD of CLKIN specification of processor is between 0.4V and 0.8V (0.8Vpp to 1.6Vpp).

Are there any ideas for matching the specifications of the processor?

Regards,
Toshi
 

  • 0
    TI__Mastermind 32575 points
    If they follow the AC-coupled LVPECL output termination (like Figure 12 in the datasheet), add ~25 ohm series resistors (Rs) on P and N side near the driver (right after 150-ohm pulldown) to form a voltage divider with the 50-ohm (Rl, single-ended) load termination at the receiver. Voltage divide ratio is (Rl/(Rs+Rl)) ~ 0.667.

    Alan