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Part Number: CDCE913
I need a clock generator, Input: a square wave with a 50% duty cycle of 100k frequency;
Output: a square wave with a 50% duty cycle of 200k frequency.
I want to know whether the CDCE913 is ok?
CDCE913 will not work. While the input of CDCE913 can accept to "0 Hz" when bypassing the PLL, PLL mode requires 8 MHz minimum input. As your output frequency is greater than your input frequency, you will require PLL mode. Also it is not possible to divide down to 200 kHz from the minimum VCO frequency.
When you say you need a clock generator, you do need it frequency locked to a 100 kHz reference, correct? Is it possible to have a higher frequency input?
LMK05318 or LMK05028 would be able to do the job for low frequency input and output. It is possible to produce 1 Hz output. You would need to also provide an external XO.
You may also find the LMK04821 suitable. Provide 100 kHz into OSCin with sufficiently large ac coupling capacitors for 100 kHz. VCO1 can be configured to 3000 MHz for instance with VCO divider = 8. If you use the SYSREF divider = 1875 you will be able to divide down to 200 kHz output, but the CLKout outputs are limited to differential output format. If you need LVCMOS, you can get 2x 3.3 V LVCMOS outputs from OSCout by programming OSCout_MUX = Feedback mux; with the feedback mux enabled and selecting SYSREF output.
More information Clock and Timing System products: http://www.ti.com/clock-and-timing/overview.html
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In reply to Timothy T:
Thank you very much for your detailed introduction.
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