Other Parts Discussed in Thread: LMK03328,
Hi
I would like to know if there is a limitation on the following issue:
If I configure the PLL for 50MHz, 100MHz,150MHz,200MHz, 125MHz, 156.25MHz - can I output the 50MHz near by the 100MHz, 150MHz, 200MHz or do I need to space the outputs?
Meaning output0 and output1 will not have the same harmonics?
I remember I saw something regarding this restriction with respect to phase noise and performance but I can not find it.
Maybe I am confusing it with a different type - I would like to check this is allowed.
If not, I highly appreciate if you can refer me to the appropriate article/application note.
Regards
Omer