Dear Ti Team,
This is Mara. We planned to use LMX2594 PLL IC for my project. So, I did the Test Board for this IC to check the evaluation performances. The results, schematic and Layout files are attached in PowerPoint.
The issue is our measurement doesn't match with your datasheet performance. Could you guide me to get better performance for this IC. I expect your appreciated response.LMX2594–Test.pdfsynthesizer_20211014.pdfArt_Work.zip
Hi Mara,
First of all, I have doubt about the phase noise test result on the TCXO. Looks to me that it is a PLL-based TCXO because there is a flat region beyond 5kHz offset.
If it is a pure crystal based TCXO, I would expect the phase noise will go straight down to the noise floor, as shown in the red trace below.
Your PLL Sim simulation did not take into account the TCXO noise. Below is the sim result if we consider the noise contribution from the TCXO, I was using your measured TCXO phase noise in the sim. As you can, the total phase noise is dominated by the TCXO noise.
in order to get the EVM performance, you need to use a super clean reference clock. Our test results were measured with a Wenzel clock. Below is the phase noise comparison.
