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Original question:
Hi Kia,
So what is the proper way to measure Phase Lock (w/scope) ?? I tried measuring the output signal with respect to both the IN0 input and then the XO input. They are not Phase Locked. Only the Outputs are Phase Locked (when I looked at a good device).
I thought maybe one of the inputs coming into chip would be Phase Locked to the output and could be observed but probably too simplistic expectation.
thanks,
tim
Hello Tim.
To obtain phase lock between the input and output, you will need to enable ZDM (zero-delay mode). To enable ZDM, please set the DPLL1_ZDM_EN high and/or the DPLL2_ZDM_EN high as shown below. The select which output requires ZDM as shown below.
Once you have ZDM between the input and one of the outputs, you can synchronize the outputs, which will therefore result in a synchronization between the input and all outputs.
To synchronize the outputs, please enable the CHx_SYNCEN.
After ZDM is enabled and all the synchronization bits are set, toggle (turn on then off) the SYNC_SW bit and your clocks will be synchronized.
Regards,
Kia Rahbar
