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TPL5010: Power on delay

ArTzy
Genius 14699 points
Part Number: TPL5010
Other Parts Discussed in Thread: TPL5110

Hi Experts,

Seeking your assistance on this query concerning the TPL5010:

Customers want to use it as a timer for power on delay. So not as usual with a uC.
Question is if it is possible to set the DONE signal by shorting RSTn and DONE?
Or is there a timeframe in between the RSTn high after startup before the DONE is allowed?

Thank you.

Regards,
Archie A.

  • 0
    TI__Guru* 85680 points

    Hi Archie,

    Suggest use TPL5110, in one-shot mode, after Vcc power up, the DRV pin will turn LOW for a configurable time once.

    Then use a D flip-flop to turn the DRV pulse to a L --> H or H --> L signal.

  • 0 in reply to Noel Fung
    TI__Genius 14699 points

    Hello Noel,

    Thanks for responding.

    As per Cx, unfortunately that's not possible in their configuration. They would like to use the chip only in its start-up mode (this should work). The question is if the chip detects the done at the same time as the RSTn is set during start-up?

    Regards,
    Archie A.

  • +1 in reply to ArTzy
    TI__Guru* 85680 points

    Hi Archie,

    I think you were talking about the first DONE signal during start-up, right?

    After RSTn returning to HIGH, internal counter starts counting. I don't know if we can provide the DONE signal at the same when the counter starts counting. To play safe, I suggest use a RC network to add some delay between RSTn and DONE. 

  • 0 in reply to Noel Fung
    TI__Genius 14699 points

    Hello Noel,

    Thanks for your answer.

    Cx have added a RC-link of 50 ms between DONE and RSTn now. Hoping that would work. If you have nothing else that we need to consider in their configuration, then we can close this case.

    Regards,
    Archie A.

  • 0 in reply to ArTzy
    TI__Guru* 85680 points

    Good luck to your customer. 

    I am closing this post now.