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CDCM6208V2G: CDCM6208V2G

Part Number: CDCM6208V2G
Other Parts Discussed in Thread: MSP430F6459, CDCM6208, , LMK6C

Hi,

I am trying to generate default output frequencies using cdcm6208, for that I am writing the default register values to the cdcm6208 through i2c interface and my host controller is msp430f6459.

I am able to write and read the registers of the cdcm6208 but no outputs or generating. can anyone please help me in this regard.

Thanks & Regards

K.Aravind,

Sigma advanced systems,

9848992750.

  • Aravind,

    Is this on the EVM, or on a custom board? If a custom board, are you able to provide a schematic?

    Is the PLL locked? The below status bits can be checked:

    Is the input clock to the device valid? What are the input/output frequencies in this system? Do you have a TICSPRO configuration, or a register file, for the desired configuration?

    Thanks,

    Kadeem

  • Hello Kadeem,

    Thanks for the response. 

    sorry for the delay.

    We are working on custom board designed by us, find the attached file for the schematic.

    When we read the status pins it is reading low(0) and register 21 is reading 0x0006, which is PLL unlocked.and loss of reference.

    Is the input clock to the device valid?

    1)How to know that whether the input clock to the device is valid ?

    2) We are giving 40 Mhz clock from oscillator LVCMOS (3.3 v) to primary input positive (PIN 8).

    when we measure the input frequency using oscilloscope we observed 900mV peak- peak and 40 Mhz.

    3)Below are the register values we are writing.

    Write_CDCM(address_msb,address_lsb,data_msb,data_lsb);
    Write_CDCM(0x00,0x00,0x01,0xB9);
    Write_CDCM(0x00,0x01,0x00,0x00);
    Write_CDCM(0x00,0x02,0x00,0x0E);
    Write_CDCM(0x00,0x03,0x08,0xF5);
    Write_CDCM(0x00,0x04,0xE0,0x5F);
    Write_CDCM(0x00,0x05,0x00,0x23);
    Write_CDCM(0x00,0x06,0x00,0x03);
    Write_CDCM(0x00,0x07,0x00,0x23);
    Write_CDCM(0x00,0x08,0x00,0x04);
    Write_CDCM(0x00,0x09,0x20,0xD3);
    Write_CDCM(0x00,0x0A,0x00,0x90);
    Write_CDCM(0x00,0x0B,0x00,0x00);
    Write_CDCM(0x00,0x0C,0x20,0x53);
    Write_CDCM(0x00,0x0D,0x00,0x90);
    Write_CDCM(0x00,0x0E,0x00,0x00);
    Write_CDCM(0x00,0x0F,0x00,0x53);
    Write_CDCM(0x00,0x10,0x01,0x30);
    Write_CDCM(0x00,0x11,0x00,0x00);
    Write_CDCM(0x00,0x12,0x00,0x93);
    Write_CDCM(0x00,0x13,0x01,0x30);
    Write_CDCM(0x00,0x14,0x00,0x00);

    4) Register 40 is reading 0x010A. We are using cdcm6208V2g and marking is CM6208V2g.

    Thanks & Regards

    K. Aravind,

    Sigma advanced systems Pvt.Ltd,

    9848992750.

  • Aravind,

    Can you confirm that these settings look correct?

     

    Per the datasheet, for a single-ended input clock, a "high" voltage on the clock input pin must be at least 0.8 * VDD_PRI/SEC, and a "low" voltage must be at most 0.2 * VDD_PRI/SEC. If VDD_PRI is 3.3 V, then a 0.9 V peak-to-peak swing will not suffice here - the clock signal must be at a minimum 0.66 V to 2.64V. This is possibly why the device is seeing a "loss of reference".

    Thanks,

    Kadeem

  • Hello Kadeem,

    Thanks for the quick response.

    Can you confirm that these settings look correct?

    Yes the settings is correct.

    When you talk about the minimum voltage levels of clock signals i.e., 0.66 to 2.64, As our clock frequency is 40Mhz which is higher frequency, can these higher frequency achieve the voltage levels around 2.64 V.

    Thanks & Regards

    K. Aravind,

    Sigma advanced systems Pvt.Ltd,

    9848992750.

  • Aravind,

    An LVCMOS clock should be able to hit the voltage requirements at this frequency - we have oscillator products, such as the LMK6C, that are LVCMOS oscillators that meet this requirement.

    Thanks,

    Kadeem

  • Hello Kadeem,

    I have changed the input clock voltage levels to 2.66V and it is working fine now. 

    Thanks for the response.

    K. Aravind,

    Sigma advanced systems Pvt.Ltd,

    9848992750.