CDCM6208V2G: CDCM6208V2G

kevin wang1

Part Number: CDCM6208V2G

I use CDCM6208V2RGZR to generate clock for TMS320TCI6638. CDCM6208V2RGZR 's input is 25MHz crystal connecting to PRI_REFP/N.

Two CDCM6208V2RGZR's output is 122.88MHZ for Y0/Y2,100MHz for Y5/Y6, 156.25MHz for Y7 in first, and second are 125MHz for Y2/Y3 and 100MHz for Y5/Y6/Y7.

When I power on, all frequency are correct but the all frequency will drop to about 94% after about 30 second.

I use oscilloscope to observe the output frequency ,the waveform is very stable in spite of the wrong frequency .

I configure status pin is PLL_LOCK,status0 pin is NOT PULL UP.

I measure the CDCM6208V2RGZR's power ,and it is 3.35V. I think power is OK.

I use 5M2210ZF256I5N to control the CDCM6208V2RGZR with SPI, the VHDL code I using is OK because I use the same code to control CDCM6208V2RGZR of other board generate clock frequency successfully.

Two boards are same schematics but the layout is a little different.

Please help me.

over 4 years ago

0 Aaron Black over 4 years ago

TI__Genius 11760 points

Hello Kevin,

Thank you for the information, this will help in our analysis, to clarify the problem - you are seeing the frequencies drop by 6% after 30 seconds of powering on?

You also indicate the PLL_LOCK, STATUS0 pin in 'NOT PULL UP', does this mean '0'? In which case the PLL is not locked. Please see section 10.4.3 Status Pins Definition for a more thorough table with explanations.

Do you have read-back capabilities through your controller?

0 kevin wang1 over 4 years ago in reply to Aaron Black

Prodigy 220 points

I mean I didn't pull-up on STATUS0 but it's High.

0 kevin wang1 over 4 years ago in reply to Aaron Black

Prodigy 220 points

The frequency 100MHz will drop to 94MHz and 156.25MHz will drop to 146MHz after 30 seconds.

0 Aaron Black over 4 years ago in reply to kevin wang1

TI__Genius 11760 points

Hello Kevin,

This definitely seems that something is changing at that time, what it is, I am not sure. Some ideas would be:

1. Checking the crystal, this is continuing to operate as normal.

2. Checking the multiple status-check pins - See Table 6: CDCM6208V2G Status Pin Definition List - making sure to read back register bit

3. Look at this document provided on E2E about debugging PLL Lock - here

4. Try with other unit to see if this is consistent

0 kevin wang1 over 4 years ago in reply to Aaron Black

Prodigy 220 points

I changed the capacitor of the loop filter and working about 10 minutes and then failed again. Any idea?

0 kevin wang1 over 4 years ago in reply to kevin wang1

Prodigy 220 points

Hi Aaron,

It looks the problem came from heat. If I am using spreader to cool down the chip, the PLL is locked. We did change input oscillator from FXO-LC538 to DSC1123BI2. Do you think that's the problem?

Thanks,

Kevin