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Hi expert,
Customer is looking for fanout solution like HMC7043LP7FE. I found one similar LMK04832.
Their system has 245.76Mhz and 240KHz, does LMK04832 support output 240Khz?
By the way, is VCXO input optional or must need?
Thanks,
Allan
I can get back to you a little sooner than Tuesday :)
LMK04832 could support 245.75 MHz, but 240 kHz is a little too low frequency - the VCO frequency of 2457.6MHz can be divided down as a continuous or pulsed SYSREF to a maximum of 2^13, which is only 300 kHz. If 245.76 MHz is available in an external VCO or VCXO, this could be directly distributed to the outputs as a divide-by-1, and divided in the internal SYSREF divider to produce continuous or pulsed 240 kHz. Alternately, the divider range could be extended with an extra discrete D-flip-flop, by routing the SYSREF at 480 kHz through the feedback mux and out of the OSCout buffer in CMOS mode, to the D-flip-flop configured as a divide-by-2 block, then back into CLKin0 to redistribute the lower frequency SYSREF signal. This scheme could of course be extended to a pulser configuration if needed by some kind of external override on the clock or D inputs. There is likely a way to do something similar with the re-timed SYNC path in the SYSREF circuit, which might not require external dividers, provided the customer has a digital controller that can sample, or is frequency-locked to, the 245.76 MHz or 240 kHz signal.
PLL1 and VCXO are optional. In fact, if a high-performance 245.76 MHz source is available, PLL2 and internal VCO are also optional - the device could instead be used in distribution mode. Performance depends on what frequency and quality of reference the customer has available.
Hi Derek,
The clock system has two sources 245.76MHz(source1) and 240KHz(source2),and is expanded to multiple SYSREF (240KHz) and multiple DEVCLK (245.76MHz) through HMC7043LP7FE. As you mention, "If 245.76 MHz is available in an external VCO or VCXO", for LMK04832, OSCin is provided by 245.76MHz VCO , and CLKin0 by 245.76MHz (source1), can this structure meet the requirements of multi-SYSREF (240KHz) and multi-DEVCLK (245.76MHz) ?
BR,
Adis
Just to confirm, you're saying that you already have two sources, one at 245.76MHz, and one at 240kHz, which were NOT generated by LMK04832 - and you just need to distribute them to multiple devices? If so, LMK04832 could be used as a distribution buffer, with 245.76MHz into CLKin1 and 240kHz into CLKin0. No PLL would be required. However, if all you need is a distribution buffer, and you don't need the delay features on the output channels and SYSREFs of LMK04832, something like LMK1D2108 distribution buffer would be significantly less expensive and could accomplish the same thing.
If you actually do need the PLL, let me know, because I may be misunderstanding your system setup.
Hi Derek,
Don't need PLL, LMK1D2108 should be Ok. I will check it.
Thanks a lot.
BR,
Adis
Hi Derek,
After double checking, input and output need in-phase, so LMK1D2108 is not suitable. But LMK04832 as a distribution buffer is OK as you suggestion.
Thanks.
BR,
Adis