LMX2594: Occasional errors occur when locking 10us

Hi zhang,

10µs switching time goal is a very aggressive target, I suggest relax your requirement to at least 50µs, given that temperature variation will affect the lock time.

What is your loop filter bandwidth and phase margin? 

when you change frequency, try below programming sequence:

Program PLL_N, PLL_NUM, then program R16, R20 followed by R19.

Also try, use a smaller capacitor on pin 3. Such as 4.7µF or 1µF.

1、The indicator in the manual is written as 5us, but it is not probabilistic during our use. What may be the specific reason.

2、Adjustments have been made according to the previous suggestions, but there has been no improvement. Please refer to the waveform below

3、1. Is the lock time written in the manual the worst or something else? Will there be a change in lock time during the repeated switching process, and how large is this change generally? What factors are related to this change?
2. Can you provide a time when the PLL output frequency can be absolutely stable (non auxiliary and fully auxiliary)

The schematic diagram is as follows：

LMX2594部分原理图.pdf

The software configuration is as follows.

Hello,

We are out of office for a US holiday. Please expect a response by Monday.

Thanks,

Kadeem

Hi Zhang,

That 5µs is a typical value when switching from 7500MHz to 1500MHz. This value will vary especially with temperature as temperature will affect analog PLL lock time. For the same reason, there is no absolute lock time for a PLL. If you want tight control to the switching time, maybe you should consider to use a DAC instead of PLL. 

From your timing diagram, the PLL is unlock after the second programming. Is this problem repeatable and always happen at the same frequency? If you increase the time interval between frequency switching, will this problem happen?

Did you try using a smaller capacitor at pin 3?

For the loop filter, below configuration may return smaller PLL lock time.

LMX2549 question .pdf

The above PDF file is based on your suggestions, test results, and some of my questions

We made the following attempts
Use full assist mode to perform fast frequency hopping between 6 frequency points first, then perform a no assist configuration to the frequency point used, and wait for 300us before using it. The 6 frequency points used correspond to the output frequencies of VCO, which are

F0: 13268

F1: 13428

F2: 13588

F3: 13748

F4: 13908

F5: 14068

Test 1: Using the configuration sequence shown in the figure below, at the end of full assist mode and when configuring frequency point 5, a delay of 300us is applied to demodulate the 8psk signal, and the sensitivity deteriorates by about 10dB compared to no frequency hopping

Test 2: Using the configuration sequence shown in the figure below, when the full assist mode ends and frequency point 5 is configured, a delay of 300us is applied to demodulate the 8psk signal. The sensitivity deteriorates by about 2dB compared to no frequency hopping

problem
1. What are the differences in the internal operations of LMX2594 between the two configuration modes, and why does the different jump styles of full assist affect the frequency of no assist?
2. In the no assist mode, is the stability of the frequency point absolutely accurate? During testing, LD signals were observed, and it would take approximately 150us to lock (with a reference clock of 40MHz). Or is it that the time we waited for this 300us is not enough
3. Is there a problem with frequent switching of LMX2594, and is there a recommended interval for this switching

anther problem：

Make the local oscillator signal output by LMX2594 jump between the frequency points of 3227MHz and 3367MHz, with a configured interval of 300us. Perform lock signal detection at 150us after configuration is completed.
Test 1: Using partial auxiliary mode with the following configuration values, there was no loss of local oscillator lock during the pressure test for half an hour
3327MHz configuration
082000
1100D2
14F048
4E00BD
2B010E

240042
00271C

3367MHz configuration
086800
1100C5
14F048
4E008D
2B00AA

240043

00271C

Test 2: Using full auxiliary mode, the configuration values are as follows. The probability of an error in half an hour of stress testing is close to one in a thousand, and the frequency of losing locks is 3367
3327MHz configuration

086800

1000F1

14F448

132769

2B010E

240042

3367MHz configuration

086800

1000E6

14F448

132752

2B00AA

240043

Test three: Use full auxiliary mode to switch the current pump, with the following configuration values. The probability of an error in half an hour of pressure testing is close to one in a thousand, and the frequency of losing lock is 3367
3327MHz configuration

0E1E00

086800

1000F1

14F448

132769

2B010E

240042

001E70

3367MHz configuration

001E00

086800

1000E6

14F448

132752

2B00AA

240043

001E70

Hi Zhang,

We will need some time to review your data. 

In the mean time, would you continue to debug by comparing the VCO capcode, VCO_SEL, VCO_DACISET in each test scenario?

attached are the calibration data of two boards that I have collected. I need to help confirm the following questions:
1. Please refer to the data in the attachment. The VCOSEL values obtained from the calibration of the two boards are different. Board 2 has been using VCO6 continuously. Is this phenomenon normal
2. I tried using the partial assist mode and calculated the calibration starting point using the method in the datasheet (as shown in the following figure). For a frequency point with PLL output of 3487 and VCO frequency of 13948, the calibration starting point was set to:
VCO-SEL=7
VCO CAPCTRL STRT=168
VCO-DACISET-STRT=320
Board 1 in the attachment can be locked, but board 2 cannot be locked. What is the reason for this? How to correctly specify the calibration starting point in partial assist mode.

Calibration data for two boards.pdf

Hi Zhang,

Table 6 shown the approximate frequency coverage of each VCO. At the boundaries of two adjacent VCO core, their frequencies are overlapping. It is possible that, after doing a VCO calibration, the device may choose different VCO core, especially when the calibrate is done at different temperature.

From your data, board 2 VCO has a wider coverage at VCO6. The capcode is 36 even at 13952MHz. However, board 1 VCO capcode has dropped to 5 at 13940MHz. So it has to use VCO7 for higher VCO frequency. 

Partial assist will perform a VCO calibration, I expect board 2 will be able to lock using VCO6. Could you check if board 2 will lock if you use other VCO_SEL value?

1、It is not possible to set VCO7 on board 2's VCOSEL in Partial assist mode. How to calculate the calibration starting point in Partial assist mode? Mainly at the junction of VCO, including the values of VCO-SEL, VCO-CAPCTRL-STRT, and VCO-DACISET-STRT.

2. I tried to jump between the output frequencies of 13268MHz and 14068MHz in VCO, every 30us, using full assist mode. During testing, it was found that the LD could not be locked for a period of time (about a few ms), and it was found that the LD at 13268MHz could be locked, while the LD at 14068MHz could not be locked, and then returned to normal. Even if 13268 is locked, it still affects communication. What may be the reason for this phenomenon? During the test, it was blown by a fan and the temperature of the board did not change by more than 5 degrees Celsius.

Hi Zhang,

As I mentioned before, partial assist will perform VCO calibration, the values you calculated from Table 6 are used as the starting point for calibration. The calibration will determine the final values. Even if you ask the device to calibrate from VCO7, if the calibration determined to use VCO6. Then it should lock using VCO6. Can you try, using board2 with VCO_DACISET_STRT = 300; VCO_CAPCTRL_STRT = 1; VCO_SEL = 1, 2, ..., 6, 7. Try to see if you can lock it with any VCO_SEL value? 

What is your programming sequence in full assist? If you increase the switching interval, will you see the same problem? Do you have a test equipment capable of measuring frequency vs time? If it is not available, can you measure Vtune vs time?

1、For board2, using VCOsel=1,2,3,4,5,6 can ultimately lock onto VCO6, but using VCO7 loses the lock and cannot be restored. Does the phase-locked loop calibration mechanism start from the current specified VCO and end at the maximum VCO? Will it still loop? From the testing results, it appears that the calculation method for the calibration starting point of the partial assist given in the document is not reliable. How can this value be accurately calculated?

2、The configuration sequence in full assist mode is random. During my testing, I found that different configuration sequences have different locking times and signal stability levels (through testing sensitivity). Is there a relationship between the order of frequency points and the interval between two frequency points in full assist mode? Is there a recommended order and frequency interval?

3、【If you increase the switching interval, will you see the same problem?】

This is not very easy to confirm, as there are requirements for the usage scenarios of the system. If there are any changes, multiple software changes will be required.

4、【Do you have a test equipment capable of measuring frequency vs time? 】

This is not very easy to confirm, as there are requirements for the usage scenarios of the system. If there are any changes, multiple software changes will be required.

Hi Zhang,

I found some devices which have similar VCO6 coverage as your board 2, I could make it lock with any VCO_SEL for fout = 3488MHz. VCO_DACISET_STRT = 300; VCO_CAPCTRL_STRT = 1

even if I use your setting, VCO-SEL=7; VCO CAPCTRL STRT=168; VCO-DACISET-STRT=320, I can still make it lock. This is expected as the calibration will eventually pick the best VCO core to lock.

My suggestion on full assist sequence is, program DACISET first as the internal LDO will take time to response. 

How is the calculation method for the calibration starting point of partial assist more reasonable to ensure that VCO can be locked in a relatively short time. Can 3488MHz be locked on a board similar to my board2 if partial assist configuration is performed using the calculation formula of datasheet? How long does it take to lock?