LMX2595: Specific frequency and low frequency problems. But otherwise working.

Part Number: LMX2595

Tool/software:

I am having trouble with the LMX2595 PLL IC. On some specific units I can't get around 2.4 GHz (less than 250 MHz bandwidth). I also have a new problem.

On all of my new units a can't  make any frequency under 180 MHz. It seems like any channel divider that needs SEG3 to be more than one, it won't output any signal.

We have just gotten familiar with reading the registers and it seems like the main PLL is locked.

We supply 40 MHz from an LMK00101SQE that is AC coupled and terminated driving a single ended to differential transformer (Mini-Circuits TC4-6T-75X), which works for all of the frequencies but the trouble one.

Any help would be appreciated.

Ian Carmack

  • Hi Ian,

    Did you cross check your register configuration is correct as compare with the configuration generate by TICS Pro?

    For example:

  • I have older designs that use the same hardware and software. To me this is a really strange problem. Something has changed in this revision of PCB and I can't find it in either the schematic, layout, or components. I have tried most everything i can think of. it is a hard failure, there is a specific frequency (and lower) where the LMX just stops working. With software that operated older systems correctly. Here is the configuration file. I have tried to read and write to the registers but this is new to us, so I'm not sure we are getting is right but it seems like a lot of the registers are correct so I think we have it.

           

    readout_to_tI.txt
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    1
    2
    3
    4
    5
    6
    7
    8
    9
    10
    11
    12
    13
    14
    15
    16
    17
    18
    19
    R112 0x7000ff
    R111 0x6f00ff
    R110 0x6e010d
    R109 0x6ddc00
    R108 0x6c00f9
    R107 0x6bcc01
    R106 0x6a0000
    R105 0x690031
    R104 0x680000
    R103 0x670000
    R102 0x663fc0
    R101 0x650019
    R100 0x640000
    R99 0x630000
    R98 0x620300
    R97 0x610ccc
    R96 0x600000
    R95 0x5f0000
    R94 0x5e0000
    XXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXX

  • Hi Ian,

    I have no problem to lock our eval board with your configuration at 150MHz, 180MHz or 2.4GHz.

    Could you share your schematic?

  • 1. We have been able to change registers separate  from running our full software. We have found that we can program 300 MHz and the IC will operate correctly. But if we change the divide to 64 (according to table 8) it fails. We can move the VCO lower to get to 150 MHz, but when the SEG3 is turned on by the divide by 64 it always fails. So it "seems" like it's not a specific frequency but a specific divide.

     2. We rework these PCBs, the 10uF caps on pins 27 29 33...) do not have a full wrap around termination (F380J106MMAAH2). If these are not connected I can't inspect it. Would there be a specific pin associated with the divider (especially SEG3) that if not connected to the capacitor would make the divider fail? What pins are associated with the divider (power, bias, gnd..)?

  • Hi Ian,

    Did you mean, the problem happens only when the capacitors at "bypass" pins were not connected properly?

  • No. I only meant to say that I can't see the connectivity of these parts, and was wondering what would happen "IF" there were disconnected during rework.

    I keep getting stuck on the issue of not being able to get to the divide by 64. How can the whole IC operate correctly until I program it for a reasonable divide (that works on other designs using this IC). This software works on other PCBs with the 2595 on it. We use this part on other PCBs that have the same synthesizer circuit section (usign the same serial connections and chip selects) , but different analog after the synth. signal is made.

  • Hi Ian,

    Those capacitors are for the internal LDOs, if they are not connected properly, LDO output is either not stable or has more noise. 

    Can you use a wider span to view if there is indeed no signal output or frequency is not correct? Is the VCO locked? You can check the LD pin or read back register R110[10:9]. 

    You can also try, program R32[6] = 1 and then = 0. This will reset the channel divider. 

  • Some of the systems that are not working do have a problem where the frequency is way off. One makes 327 MHz instead of 300 MHz. Generally when we read back the register the has LD, it shows a locked value. Also, isn't the LD signal multiplexed on the MUX OUT pin. That would mean we would have to switch the MUXOUT pin from readback to LD every time we wanted to change from register readback to LD. I don't currently have a way to visually check RD, I'd have to connect a VOM or something.

    Can you tell me which specific power and bias pins, anything that supplies power,  to the divider section?

  • I have gotten the lock detect selected and it shows the PLL being locked for both good and bad frequencies. I am checking it with an oscilloscope so that I can see if it glitches. I don't see any dip. The voltage is lower than I would think. The part is well supplied with 3.3 volts, it only goes to 2.9 volts. I do have a pull up connected (3.0 K Ohms) so that when we make the MUX OUT serial out, it is not floating. We have had trouble with serial not being managed. The MUXOUT might not have enough drive for this resistor.

  • Hi Ian,

    No need to change MUXout to LD output, keep using it as read back output and then read R110[10:9] for lock status. 

    At failure, please check

    - if there is no output or output frequency is not correct

    - if the VCO is locked, read R110

    - if R32[6] can resolve the problem

    To debug:

    - try VCO = 9600MHz, CHDIV = 64 (150MHz output) and CHDIV = 48 (200MHz output)

    - try VCO = 7680MHz, CHDIV = 64 (120MHz output) and CHDIV = 48 (160MHz output)

    - try VCO = 11200MHz, CHDIV = 64 (175MHz output) and CHDIV = 32 (350MHz output)