Tool/software:
I am having trouble with the LMX2595 PLL IC. On some specific units I can't get around 2.4 GHz (less than 250 MHz bandwidth). I also have a new problem.
On all of my new units a can't make any frequency under 180 MHz. It seems like any channel divider that needs SEG3 to be more than one, it won't output any signal.
We have just gotten familiar with reading the registers and it seems like the main PLL is locked.
We supply 40 MHz from an LMK00101SQE that is AC coupled and terminated driving a single ended to differential transformer (Mini-Circuits TC4-6T-75X), which works for all of the frequencies but the trouble one.
Any help would be appreciated.
Ian Carmack
I have older designs that use the same hardware and software. To me this is a really strange problem. Something has changed in this revision of PCB and I can't find it in either the schematic, layout, or components. I have tried most everything i can think of. it is a hard failure, there is a specific frequency (and lower) where the LMX just stops working. With software that operated older systems correctly. Here is the configuration file. I have tried to read and write to the registers but this is new to us, so I'm not sure we are getting is right but it seems like a lot of the registers are correct so I think we have it.
R112 0x7000ff R111 0x6f00ff R110 0x6e010d R109 0x6ddc00 R108 0x6c00f9 R107 0x6bcc01 R106 0x6a0000 R105 0x690031 R104 0x680000 R103 0x670000 R102 0x663fc0 R101 0x650019 R100 0x640000 R99 0x630000 R98 0x620300 R97 0x610ccc R96 0x600000 R95 0x5f0000 R94 0x5e0000 R93 0x5d0000 R92 0x5c0000 R91 0x5b0000 R90 0x5a0000 R89 0x590000 R88 0x580000 R87 0x570000 R86 0x560000 R85 0x55fb00 R84 0x540001 R83 0x530000 R82 0x521f00 R81 0x510000 R80 0x507777 R79 0x4f0037 R78 0x4e0027 R77 0x4d0000 R76 0x4c000e R75 0x4b0a80 R74 0x4a0000 R73 0x49003f R72 0x480001 R71 0x4700c1 R70 0x46e378 R69 0x450000 R68 0x4403fc R67 0x430000 R66 0x4201fe R65 0x410000 R64 0x401bcc R63 0x3f0000 R62 0x3e0333 R61 0x3d00fc R60 0x3c0000 R59 0x3b0001 R58 0x3ac001 R57 0x390020 R56 0x380000 R55 0x370000 R54 0x360000 R53 0x350000 R52 0x340820 R51 0x330080 R50 0x320000 R49 0x314180 R48 0x300300 R47 0x2f0300 R46 0x2e07fc R45 0x2dc0f2 R44 0x2c3220 R43 0x2b0000 R42 0x2a0000 R41 0x290000 R40 0x280000 R39 0x270001 R38 0x260000 R37 0x250104 R36 0x24010e R35 0x230004 R34 0x220000 R33 0x211e21 R32 0x200393 R31 0x1f43ec R30 0x1e318c R29 0x1d318c R28 0x1c0488 R27 0x1b0002 R26 0x1a0db0 R25 0x190624 R24 0x18071a R23 0x17007c R22 0x160001 R21 0x150401 R20 0x14d848 R19 0x1327b7 R18 0x120064 R17 0x1100e0 R16 0x100080 R15 0x0f064f R14 0x0e1e70 R13 0x0d4000 R12 0x0c5001 R11 0x0b0018 R10 0x0a10d8 R9 0x090604 R8 0x082000 R7 0x0740b2 R6 0x06c802 R5 0x0500c8 R4 0x040a43 R3 0x030642 R2 0x020500 R1 0x010808 R0 0x002418
Hi Ian,
I have no problem to lock our eval board with your configuration at 150MHz, 180MHz or 2.4GHz.
Could you share your schematic?
1. We have been able to change registers separate from running our full software. We have found that we can program 300 MHz and the IC will operate correctly. But if we change the divide to 64 (according to table 8) it fails. We can move the VCO lower to get to 150 MHz, but when the SEG3 is turned on by the divide by 64 it always fails. So it "seems" like it's not a specific frequency but a specific divide.
2. We rework these PCBs, the 10uF caps on pins 27 29 33...) do not have a full wrap around termination (F380J106MMAAH2). If these are not connected I can't inspect it. Would there be a specific pin associated with the divider (especially SEG3) that if not connected to the capacitor would make the divider fail? What pins are associated with the divider (power, bias, gnd..)?
Hi Ian,
Did you mean, the problem happens only when the capacitors at "bypass" pins were not connected properly?
No. I only meant to say that I can't see the connectivity of these parts, and was wondering what would happen "IF" there were disconnected during rework.
I keep getting stuck on the issue of not being able to get to the divide by 64. How can the whole IC operate correctly until I program it for a reasonable divide (that works on other designs using this IC). This software works on other PCBs with the 2595 on it. We use this part on other PCBs that have the same synthesizer circuit section (usign the same serial connections and chip selects) , but different analog after the synth. signal is made.
Hi Ian,
Those capacitors are for the internal LDOs, if they are not connected properly, LDO output is either not stable or has more noise.
Can you use a wider span to view if there is indeed no signal output or frequency is not correct? Is the VCO locked? You can check the LD pin or read back register R110[10:9].
You can also try, program R32[6] = 1 and then = 0. This will reset the channel divider.
Some of the systems that are not working do have a problem where the frequency is way off. One makes 327 MHz instead of 300 MHz. Generally when we read back the register the has LD, it shows a locked value. Also, isn't the LD signal multiplexed on the MUX OUT pin. That would mean we would have to switch the MUXOUT pin from readback to LD every time we wanted to change from register readback to LD. I don't currently have a way to visually check RD, I'd have to connect a VOM or something.
Can you tell me which specific power and bias pins, anything that supplies power, to the divider section?
I have gotten the lock detect selected and it shows the PLL being locked for both good and bad frequencies. I am checking it with an oscilloscope so that I can see if it glitches. I don't see any dip. The voltage is lower than I would think. The part is well supplied with 3.3 volts, it only goes to 2.9 volts. I do have a pull up connected (3.0 K Ohms) so that when we make the MUX OUT serial out, it is not floating. We have had trouble with serial not being managed. The MUXOUT might not have enough drive for this resistor.
Hi Ian,
No need to change MUXout to LD output, keep using it as read back output and then read R110[10:9] for lock status.
At failure, please check
- if there is no output or output frequency is not correct
- if the VCO is locked, read R110
- if R32[6] can resolve the problem
To debug:
- try VCO = 9600MHz, CHDIV = 64 (150MHz output) and CHDIV = 48 (200MHz output)
- try VCO = 7680MHz, CHDIV = 64 (120MHz output) and CHDIV = 48 (160MHz output)
- try VCO = 11200MHz, CHDIV = 64 (175MHz output) and CHDIV = 32 (350MHz output)