CDCE913-Q1 default setting

Ryuuichi machida

Other Parts Discussed in Thread: CDCE913-Q1

Hi,

According to Datasheet of CDCE913-Q1, default setting of Sx(S0 to S2) is "0b001". This means that Y1_1 and FS1_1 will be used.

However, for PLL1, PLL1_0 will be used in default setting.

My customer asked us why PLL1_1 is NOT used in default mode. And they think that there is any reasons not to be used PLL1_1 in default mode.

Do you know why PLL1_0 is used in default mode ?

Best Regards,

Machida

over 9 years ago

0 Gabe Ayala over 9 years ago

TI__Genius 10320 points

Hi Machida,

There is no difference between PLL1_0 and PLL1_1 other than their respective divider values. By default, the PLL is bypassed however due to MUX1.

Gabe

0 Ryuuichi machida over 9 years ago in reply to Gabe Ayala

Guru 11615 points

Hi Gabe-san,

Thank you for your reply.

My customer understood as shown below.

TI intended to use PLL1_1 in default. So default setting of Sx(S0 to S2) became "0x001" (Y1_1 and FS1_1).

However, there is any relationship b/w PLL number which will be used in dafault and default setting of Sx pins.
Is my understanding correct ?

Best Regards,

Machida

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CDCE913-Q1 default setting