Other Parts Discussed in Thread: CDCM6208
Hello,
We want to connect PLL_LOCK status signal of CDCM6208 device to system reset.
As mentioned in datasheet, if we use PLL_LOCK for System reset, then provide a RC delay.
Please let me know that, What should be the min. RC delay filter should be used to avoid rare cycle slips ?
It will also be useful, if you can suggest a app note for this.
Thanks and Regards
Tarang Jindal
