LMK04828: Questions

Hello Sato-san,

Here are my comments:

1. LMK04828 datasheet mentions how we should do for unused clock in/out pins. However there is no description about SYNC pin.
   How should we do for SYNC pin if we don’t use it?
   ADC32RF44EVM left the pin floating. Is this best way?
   A: SYNC pin, if not used can be left floating.
2. If we use RESET pin as SPI readback function, we need to program device registers. However RESET pin functions as Reset function until programing is completed. So, in some failure situation that accidentally make reset-pin level High before programing is completed, programing may also fail.
   To avoid the situation, do you have any recommended program sequence or hardware workaround?
   A: First program the RESET pin function to SPI readback from RESET_MUX,then program the RESET_TYPE to output.
3. Considering below configuration, which is better using VCXO(20MHz, 1ppm) or TCXO(20MHz, 1ppm) as LMK04828 OSCin source?
   20MHz from OSCin is output to OSCout, and it connects to LMX2582 input. And LMX2582 generates any frequency from the 20MHz. And clock out of LMX2582 connects to Fin/CLKin1 of LMK04828 and it operates as distribution mode for high speed ADC, FPGA and its sysref signal.
   We basically would like to reference to ADC32RF44EVM schematic. Then, which is better do you think VCXO(20MHz, 1ppm) or TCXO(20MHz, 1ppm) as LMK04828 OSCin source?
   A:VCXO generally will have more pulling range and the frequency is defined by the control voltage. While using the PLL1 in closed loop,VCXO is required. TCXO has better frequency stability. If OSCin to OSCout path is used and PLL1 is open loop (not used), then i would prefer TCXO.
4. For example, LMX2582 generates 1.6GHz and it goes into Fin/CLKin1 of LML04828, we can get 1.6GHz DCLK output without any problem by selecting 1 as DCLK divider, correct?

A: Yes, this is no issue. Please use Bypass from DCLKoutx_MUX.

Best regards

Puneet