LM555: Reset signal in LM555

Ankit Gupta6

Part Number: LM555
Other Parts Discussed in Thread: TLC555, LMC555

HI,

I am trying to build a simple cyclic pulse generator circuit using LM555. I want it to function as is shown in the attached image.

When the reset goes low i want the output to be stopped or set to a particular value and when the reset signal again goes high i want the switching signal to start with exact same frequency and duty cycle as before. The rising edge of the reset signal and the output should be synchronized.

I tried with a simple astable multivibrator circuit with the fixed duty cycle and frequency. When the reset pin is pulled low the output voltage sets at 2V, however when i again give high to the reset pin switching starts randomly. it takes 3 switching cycles by LM555 to go back to the original frequency.

Has someone faced this issue?

Can there be any other simpler way of achieving it? i was thinking about a small microcontroller maybe,

over 7 years ago

0 Ron Michallick over 7 years ago

TI__Guru**** 165376 points

Ankit,

Do you have a output frequency in mind? What is the minimum reset pulse width?

I would expect a constant output stream with RESET pin high. When RESET goes low, the output and discharge will go low. Here is where things get interesting. The precondition of the timing capacitor voltage and the RESET pulse width will affect the result.

For a long RESET low it is simple; timing capacitor goes down to 0V instead of the usual 1/3 Vcc. Therefore the first cycle after RESET release will be longer because the timing cap start at 0V instead of 1/3 Vcc.

One solution is to force timing capacitor to 1/3 Vcc (maybe a tiny bit lower) when RESET is Low. Then when RESET goes high the timing cycle can start anew in the same way as a natural astable cycle.

0 Ankit Gupta6 over 7 years ago in reply to Ron Michallick

Intellectual 565 points

Hello Ron,

I want the pulses to have a frequency of 100kHz.

yes, you are right when reset output is high the pulses are present and when I pull reset pin low, the output goes low.

Also, I noted that the timing capacitor discharges completely during my reset period and starts from zero when I pull the reset back up again.

can you suggest me a simple strategy by which I can force the timing capacitor to 1/3Vcc?

-Ankit

0 Ron Michallick over 7 years ago in reply to Ankit Gupta6

TI__Guru**** 165376 points

Ankit,

100 kHz is quite high for LM555. TLC555 or LMC555 will be a better choice. To get your desired function, chaining together two monostables would be easier to implement than a 1/3 Vcc precharge.

Before putting that together, I would like to know the supply voltage and minimum reset low time.

0 Ankit Gupta6 over 7 years ago in reply to Ron Michallick

Intellectual 565 points

Hello Ron,

I am planning to feed the output of this timer to a DSP, so the input has to be around 3.3 V.

minimum reset duration can be around 500 nS.

My main motive is to generate a cyclic pulse which can be reset by giving a signal to the reset pin through a DSP. Once i remove the reset signal, i want the cyclic signal to start with exact same duty and frequency.

Regards

Ankit

0 Ron Michallick over 7 years ago in reply to Ankit Gupta6

TI__Guru**** 165376 points

Ankit,

I tried the dual mono circuit but I didn't like the TI-Tina sim results. So I switched back to the forced timing cap idea. In simulation the RESET pulse needed to be a little wider. This also gives more time to get timing cap at right voltage. It simulates OK , but I have not built or tested this circuit.

If these RESET pulse come at fixed rate that is a fraction of the timer rate, then I would suggest a phase lock loop (PLL) instead.

TLC555 Astable with sync restart.TSC

Clock & timing

Clock & timing forum

LM555: Reset signal in LM555