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LMK03318: LMK03318 can't configure EEPROM successfully via i2c

Part Number: LMK03318
Other Parts Discussed in Thread: CODELOADER

hi ,

      We use CPU on our own motherboard to control LMK03318 through IIC,

The HEX configuration generated using the GUI can get the desired clock,

but it can't be written to EEPROM.There is no clock output when power is down and then power on.

         We follow ''10.5.4 Write SRAM  '' and ''10.5.5 Write EEPROM''of datasheet. 

but R136 register always is 0x1. 

HW_SW_CTRL is H    

GPIO[3:2]  is HH

Is there any good idea to debug??

  • Hello,

    First, set HW_SW_CTRL = L and see if that fixes your issue.

    There are two procedures listed in 10.5.4. Are you following the first procedure?
    If so, GPIO[3:2] = HH corresponds to EEPROM page 5. Make sure that you write R145[3:0] = 0x5.

    Read register R137 after and EEPROM write. If R137.5 = 1, this indicates there was an error programming EEPROM. if this is the case, the issue is likely with the I2C data transfer.

    Kind regards,
    Lane
  • hi,

        Lane, Thank for your reply。

    1). I set HW_SW_CTRL = L,but the problem is not solved.

    2). yes ,I follow the  first procedure

    ''1. Program the device registers to match a desired setting.
    2. Write R145[3:0] with a valid SRAM page (0 to 5) to commit the current register data.
    3. Write a 1 to R137.6. This ensures that the device registers are copied to the desired SRAM page.
    4. If another device setting is desired to be written to a different SRAM page, repeat steps 1-3 and select an
    unused SRAM page.''

    Write SRAM
    (R145) 0x91 write 0x5
    (R137)0x89  write 0x40

    3).Make sure  write R145[3:0] = 0x5.

    4).Read register R137 after EEPROM write,R137=0x11,so  R137.5=0

    5).Using the generated HEX file, the desired clock signal can be generated normally through IIC.

    so,I2C data transfer should have no problem.

    Do you have more suggestions to solve this problem??

    Best Regards

    chuanjie

  • Hi chaunjie,

    This programming procedure looks OK.

    Your register readback after EEPROM programming has R137.0 = 1, which could mean that The EEPROM data transfer was not finished prior to locking EEPROM. After writing 0xEA to R144 then 0x11 to R89 (unlock EEPROM then program EEPROM), wait at least 230ms for the EEPROM programming cycle to complete before writing 0x00 to R144 (lock EEPROM).

    Attached is a spreadsheet that you can use to generate a register programming sequence for LMK03318. Be aware that the spreadsheet does not use the REGCOMMIT method, but direct writes to the RAMDAT register (procedure #2 in datasheet section 10.5.4).

    Kind regards,
    Lane

    3857.LMK033x8_EEPROM_programming_v1.xlsx

  • Hi Lane,

    1、  " After writing 0xEA to R137 then 0x11 to R89 (unlock EEPROM then program EEPROM), wait at least 230ms for the EEPROM programming cycle to complete before writing 0x00 to R137 (lock EEPROM)." , in your mai the content is not same as datasheet. datasheet is "Write 0xEA to R144. This provides basic protection from inadvertent programming of EEPROM. (10.5.5)", Why ?

    2、 We  directly  write  to the RAMDAT register by your suggestion,  wait some minutes, but R137 is alway 0x11,  R137.0 The NVMPROG bit is not automatically cleared to 0. Why ?

    [0] NVMPROG RWS C 0 N EEPROM Program Start. The NVMPROG bit is used to begin an on-chip EEPROM Erase/Program cycle. The Erase/Program cycle is only initiated if the immediately preceding I2C transaction was a write to the NVMUNLK register with the appropriate code. The NVMPROG bit is automatically cleared to 0. The EEPROM Erase/Program operation takes around 230 ms.

     

     

  • Hi chaunjie,

    1. That was a typo, i mean write it to R144 (0x90). I just edited my last post to correct this.

    2. R137.0 bit (NVMPROG) is automatically cleared after ~230ms. If this bit never clears then this could be the cause of your issue. Maybe the issue is a damaged part. Have you tried to program the EEPROM of another device?
    Another possibility is that you interrupt the EEPROM programming sequence: the NVM Unlock and NVM Program write commands must be atomic writes.  There cannot be any other I2C commands (read or write, even to other devices on the I2C bus) in-between these two NVM Unlock/Program commands.
    When you follow this sequence, you cannot insert other read/ write commands between or EEPROM may not program successfully. After writing 0xEA to R144, the next I2C transfer must be write 0x11 to R89 , and the next I2C transfer must be to write 0x00 to R144. 


    Besides this, it may help to readback the EEPROM before and after programming to see if anything changed.

    Kind regards,
    Lane

  • Hi, Lane

    I have two questions:

    1、How many  one of eeprom page capacity dose have  ?
    2、I want to use STAT0_INT and STAT1_INT, i should how to do?  When the eeprom is writen, what is the status?





    Kind regards,
    chuanjie

  • Hi chaunjie,

    A1. The EEPROM has 51 registers per EEPROM Page. You can view the EEPROM Map on datasheet section 10.6.100 .

    A2. You can configure the interrupts using the Status Page in CodeLoader or TICS Pro GUI. Toggle the Interrupt Enable dropdown box to "Enabled".

    Kind regards,
    Lane