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Timing Circuit to Determine Frequency Ratio

Other Parts Discussed in Thread: LMX2571, LMX8410L

Hello everyone. I'm designing a microwave system that will operate somewhere between 1-2 GHz.  I would like to measure the input frequency, which could be anywhere within the stated bandwidth, and determine the ratio between the input microwave signal and a reference signal.  So if the reference is chosen to be 100 MHz, the frequency ratio would be 10 for a 1 GHz input and 20 for a 2 GHz input.  By using a reference frequency an order of magnitude lower than the expected signals, I can represent the ratios represented by my bandwidth with a 5 bit counter. I would then like to use this ratio to set a programmable divider in a PLL.

So my rough concept is to use the reference signal to drive a five bit counter with a binary coded decimal (BCD) output, then at the end of the counting cycle I'd use the BCD output to set the programmable counter of a PLL.  Not sure if this would work.  Most of the counters I've seen thus far will simply count until they roll-over.  I'd like to count for one period of the reference, send the BCD representation to the PLL, then start the counter again on the next reference cycle. 

Any insights would be appreciated.

Best,

Dave

  • David,
    So let's assume that you have a 100 MHz reference frequency (Fosc) and they you have a receive signal in the 1-2 GHz range (Fin), and you want to determine the ratio Fout/Fosc.
    Here's a few thoughts I have:

    1. Use a PLL/VCO, like the LMX2571 with a 100 MHz Fosc frequency. The LMX2571 can create any frequency in the 1-2 GHz range, and call this frequency Fout. Now mix Fout and Fin and when you get something closest to DC, then call that the frequency. This is a fractional PLL, so you could get all the resolution you would ever need.

    2. Do a similar thing with the LMX8410L PLL downconverter as this contains a mixer also.

    3. Not sure if this would work, but how about this;
    a. Divide both the Fin and Fosc frequency by 8, or some value to get the frequency down to a manageable value
    b. put an additional counter (D) in the Fin path.
    c. Now feed both the Fosc/8 and the Fin/(8D) signals to an up/down counter
    d. Now play with the D value. If it is too small, the counter rails one way, too low, it rails the other way.


    Regards,
    Dean
  • Dean,

    Thanks for getting back to me so quickly. I actually want to determine the ratio between Fosc and Fin. I previously considered your first two solutions utilizing a PLL, but couldn't determine the best way to implement it. Maybe you can help me resolve what I saw as the limitations of that approach.

    I have the reference Fosc and Fin. The Fin can change to any value in the band without any previous knowledge, so I need to compute the Fin/Fosc ratio dynamically. I could take Fin and Fout and mix them together as you suggested, but I would need a feedback loop to drive the PLL feedback divider such that Fout and Fin are equal. Then I would need to take the divider ratio and feed that value to a second PLL to implement a second function I'd like to complete.

    My thinking in the original post is that by using the Fosc as the clock, the number of cycles of Fin I count using Fosc as the clock automatically provides the ratio. So if my clock is 100 MHz and my Fin is 2 GHz, I'd count 20 cycles of Fin for each cycle of Fosc, plus or minus one count. By keeping an order of magnitude between Fosc and Fin, I maintain enough resolution to specify the divider ratio with several bits.

    Best,

    Dave
  • Dave,

    I agree that PLL based approaches would require mixing the signal and some logic to play with the dividers. It sounds like the approach you are thinking of is something more based on counters (maybe flip-flops). I think that if the ratio of Fout/Fosc is an integer, this is likely the best approach. If you find your frequency is too high to use whatever logic chip you want, you can always divide down both Fout and Fosc by a fixed divide value.

    Regards,
    Dean
  • Thanks Dean. Any recommendations on a counter that would accept Fosc as the clock to count the input Fin, and that will output the result in a BCD format?
  • David,

    My guess would be as good as yours. TI makes up/down counters like the CD4510BNSR , but it is slow, so you would need a big divider before it. But I'm not the expert on counters.

    Regards,
    Dean