LMX2491: Loop BW vs FM Triangle Speed

Noel, thanks for that very prompt response.  Let me analyze that a little.  

What you are effectively saying is that the maximum frequency ramp speed is the dominant consideration.  However, this is effectively an OPEN LOOP parameter, and we must also be concerned with closed loop behavior. 

The max ramp (slew rate) limit is set by the charge pump current driving the main loop filter capacitor.  If we reach 100% duty cycle on the charge pump ON time, the phase detector would roll over, so we must stay under this limit.  But, what is this limit and its implications?

I attach an article I recently published on low noise synthesizer design, the first in a 5 part series in "Microwaves & RF", which reviews basic loop design before getting into noise analysis.  It gives the 2nd order loop design results, which are a quick and easy way to get an approximation for the main loop filter capacitor.  Using the equation for C2 and the slope of the max voltage on C2 from the charge pump, a few lines of algebra will show:

df/dt (max) = N*(Wn)^2.   In this equation "Wn" is the loop "natural frequency".  Wn is approximately related to open loop bandwidth by Wn = Wloop / (2*Zeta), where Wloop is open loop bandwidth and Zeta is 2nd order damping factor (about 0.7).  

Figure 8 in the lmx2491 data sheet shows a high slew rate ramp of 50us period and slope 8E11 Hz/sec.  The peak to peak swing is 20MHz with a carrier of 1.5GHz.  How does this compare to the open loop slew limit? Well, if the loop bandwidth is 380kHz (the bandwidth mentioned in the eval kit), then at Zeta = 0.7 the loop natural frequency is 271kHz.  Convert to rad/sec and assume fref = 100MHz as in the eval kit, and we find df/dt (max) = N*(Wn)^2 =  4.3E13 Hz/sec.  So, we are well within the slew rate limit in Fig. 8, more than an order of magnitude below that limit.   

Now consider closed loop behavior.  The frequency of this triangle wave is 1/50us = 20kHz, about 7.4% of the likely loop BW of 271kHz.  The loop has no trouble keeping up with this 20kHz FM signal generation demand. 

But, now consider the SAME SLOPE but with peak to peak swing of 2kHZ.  The peak to peak time is reduced from 50us to 4.54ns.  The frequency of this triangle wave is 220MHz.  There is no way the loop can follow it in the closed loop state, even though it can generate the slope. 

It would seem the closed loop bandwidth here is also a required consideration.  So, I think the question here comes down to the multiple above the triangle wave frequency the loop bandwidth needs to be.  In Figure 8 that multiple is about 14X, but it can probably be more in the range of 5X to 10X and still have a fairly accurate triangle wave.  If TI does not have discussion of this in its materials, then this is probably a good subject for a new app note. 

Best,

FarronArticle1On-Line.pdf

Hi Dean--always nice to hear from the PLL master whose book sits right on my desk. 

In the 2nd example I was mentioning the reduced deviation was 20kHz, but fmod was not 200kHz.  Instead, I kept the same slope as in Fig. 8 (a 20MHz deviation), which with a 2kHz deviation slammed fmod up to 220 MHz.  

That illustrates that it is not just slew rate at issue here, as slew rates that are well within the chip open loop drive capability can generate waveforms whose frequency is orders of magnitude beyond the frequency the loop can track to.

From the 2nd order approximation C = Kvcohz * Ipd / (N * (Wn)^2), doubling bandwidth is going to increase max slew 4X, since Ipd stays the same but C goes down to 1/4.  But, it is still fundamentally an open loop issue--as in the slope imposed by a current source driving a capacitor.  This is EXPRESSED in terms of Wn in the equation I gave above (since capacitance and Ipd can be related to Wn), which is a closed loop parameter, but it remains a fundamentally open loop phenomenon.  But, with the zero resistor in series with that cap, there is an overshoot and then a closed loop settling time, with distortion the result.   There is no avoiding the closed loop effects and limits.  

I'm in the middle of a project using the LMX2491 where this is an important issue.  It's a consumer product, so could be some high volume for the part.  For the price, that is a very impressive part.  I need here to get a repeating ramp or triangle with minimum distortion, but with limits on the loop BW due to regulatory spur suppression requirements.  When the loop is modulated, the phase detector width is jumping up and the spurs go up right along with it.  So, I need the narrowest loop bandwidth that will allow sufficiently accurate modulation. 

In my MSEE thesis 30 years ago I had a similar problem.  I was trying to understand how the loop fought against modulation inserted into the VCO steering voltage, and to reduce the effect of the loop doing so.  As part of that I defined a signal to distortion ratio imposed by the loop that could be expressed as a function of loop parameters.  This allowed optimization to achieve the best signal to distortion ratio. 

I can probably do the same here, but I was hoping you guys had already done it for me and would save me a day or two of work.  If nobody there has that handy, I'll do a distortion analysis myself. 

Thanks,

Farron

Hi Dean:

Thanks for the trouble to put together that detailed report.  I think you have the foundation for a very useful app note for Texas Instruments there, but there seem to be a couple of bugs in the derivation of the minimum bandwidth needed (first rule of thumb). 

The first rule is the same concept I was using to derive a minimum necessary bandwidth, except you are doing it for the 3rd order loop instead of the simpler 2nd order loop I had used.  On the first page, you state df/dt = fdev*fmod.  But, from the figure the deviation is single sided and happens in a quarter of a cycle, so it should be df/dt = 4*fdev*fmod. 

On the second page you have results df/dt = N*w^2 * (sec-tan)^2.  But, the square on sec-tan appears to be an error if the expression root (1 / (sec-tan)^2) is correct, since the square root will take off the square.

This then follows into the final results, with an additional error.  You have BW (rad/sec) > Root ((1/6.8*N)*(fdev / fmod)).  This should apparently be BW > Root (0.59*fdev*fmod/N). The factor fdev*fmod had no reason to turn into a quotient. 

I have not gone farther in reviewing rule 2 on cycle slipping, but I wonder how much rule 2 is really needed.  Since rule 1 will give a bandwidth that supports an fdev / fmod at 100% duty cycle, it defines a BW that keeps the duty cycle at 100%.  Any lesser fdev will keep phase detector duty cycle at less than 100% EXCEPT that extra frequency shift due to R2 will build up phase error faster.  Was rule 2 needed because of the effect of R2? 

I'll look at rules 2 and 3 following your reply.  Once it is clear the formulas are right, it's a nice app note and maybe the beginning of a useful new chapter on sigma delta modulation for the next edition of your book. 

Thanks,

Farron

Hi Dean:

OK, I have two points.

First, I had not really thought it was necessary to use the 3rd order loop for the approximation of minimum necessary bandwidth as a function of ramp slope.  But, after checking numbers carefully I see something very interesting that leads me to alter that.  When I compare the main loop filter capacitance in the 2nd order loop case, it is consistently about 60% of the value of the 3rd order case.  This holds for both the calculation of C2 using the old fashioned 2nd order standard normalized form, or finding C2 from the modern open loop analysis applied to the 2nd order loop.  It is more than any difference in approximate formulas relating damping factor and phase margin, and natural frequency as compared to loop BW.  It is in the fundamental nature of the 2nd order model where phase keeps coming back to zero from the zero resistor R2, compared to phase reaching a peak at the loop bandwidth and then coming down for 3rd order and higher loops. 

So, you are correct to use the 3rd order loop as the simplest loop that approximately captures the total capacitance A0 for finding the ramp speed as driven by the charge pump.  A nearly factor of two error from the 2nd order approximation is too much error to be considered a good approximation.  Though Best, Gardner, and pretty much all the early respected PLL authors were hooked on the 2nd order model as a good approximation, there are cases where it just isn't. 

But, I think you still have a problem in your 3rd order loop derivation of required bandwidth, as follows:

You now give final answer as BW > Root ( (1/10N)*(fdev / fmod) ). 

But, back up two lines to df/dt = N*(2pi*BW)^2 * (Root(2) - 1) ~ 0.4N*BW^2. 

That should be df/dt ~ 16.3N* BW^2.  You forgot to square the 2pi. 

When you substitute df/dt = 4 fmod* fdev for df/dt, then you have 4 fmod*fdev ~ 16.3N* BW^2.

Then solving for BW, you should have BW ~ Root( (0.245*fmod*fdev ) / N).  The fmod*fdev does not turn into fdev / fmod as you are using. 

Thanks,

Farron

Hello Dean:

In addition to the above probable errors for Rule 1, I believe there are one each of an arithmetic error and a conceptual error in Rule 2 for avoiding cycle slipping. 

Arithmetic:  Note where you insert Fdev*Fmod for df/dt.  That should be 4*Fdev*Fmod. 

Conceptual:  Going from the next to last line to final result, you use Fmod*DeltaT = 1. But, the question here is what DeltaT applies?  You are assuming the FULL DeltaT from one end of the triangle wave to another.  That would apply to prevent cycle slipping for a step function in frequency.  But, in this triangle situation the actual frequency step and actual DeltaT are different.  They are a tiny stair step, like a 100Hz step at time to generate the ramp.  It is far too conservative to substitute a ramp for a step function. 

A simple relation that would seem to hold is BW > DeltaF / 5N, where DeltaF is the frequency increment in the ramp or triangle.  That DeltaF is a step function, but it will be a small number, generally in the range of about 1Hz to 10kHz., simply  dependent on the granularity of the ramp.  Not much bandwidth is going to be needed to support the ramp for cycle slip avoidance, unless it is a really fast sweep covering a wide range that calls for large coarse steps in the ramp.   

The BW to support the slew rate is larger than this will be, but also small in the big picture.  The bandwidth to support low distortion in the triangle will probably be dominant. 

Best,

Farron