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LMK04832: Continuous SYSREF synchronization

itamar mazaki
Prodigy 60 points
Part Number: LMK04832

Hello,

Is there a way to start the sequence of continuous SYSREF after a SYNC edge? (or some other event), so that the edge of the 1'st SYSREF has a known timing difference relative to the Sync signal?

Thanks

Itamar

  • 0
    TI__Mastermind 31820 points

    Hi Itamar,

    You can set the SYNC_DISSYSREF bit to 1 to force the SYSREF outputs into a reset state while the SYNC is asserted. Then the SYNC deassert could be used as the SYNC edge to generate the known first timing difference on the continuous SYSREF.

    Alternately, the dividers could be synchronized in advance to establish the proper timing. Once the timing of SYSREF has been established, the SYSREF_REQ_EN bit can be used to trigger continuous SYSREF output whenever the signal on the SYNC pin is asserted. During programming of the SYSREF timing, it may be helpful to hold the SYSREF output in a known state; this can be done with the SYSREF_GBL_PD bit and the SCLKX_Y_DIS_MODE settings. 

    Regards,