Hi Experts,
My customer has question as follows Would you please answer them?
1. Do you have a spec for VCXO? Customer would like to use Pull Range = +/-280ppm. Is it resonable for LMH1983?
2. According to Figure 28 in datasheet, reference clock is input to Hin(Hsync). Is it possible to synchronize the clocks by Hsync only, correct?
3. Regarding LOR;
3-1. Datasheet p17 stated "Given this is a divide-by-two counter, the time to declare LOR is: (2 x 32767) / (27E6) = 2.4 ms", p17(8.3.8 LOR Determination)".
Is this comment for when only Hsync is lost, correct?
3-2. Datasheet p17 stated "On the other hand, when the PLL is locked and there are missing HSync pulses, LOR is set when the internal counter is greater than the following: (Number of 27 MHz clocks in one Hsync pulse + 3) x (LOR_THRES + 1)".
Is this comment for when only Hsync is missing, correct?
3-3. Datasheet p3 stated "When locked to reference, an internal 10-bit ADC will track the loop filter control voltage. When a loss of reference (LOR) occurs, the LMH1983 can be programmed to hold the control voltage to maintain output accuracy within ±0.5 ppm (typical) of the previous reference."
The typical accuracy of output frequency is +/-0.5%. What is the accuracy of max value?
Best Regards,
Fujiwara
