Other Parts Discussed in Thread: CLOCKDESIGNTOOL, PLLATINUMSIM-SW
Hi Clocking team,
I have a customer that would like to know if there is a tip/trick to simulate the external VCXO instead of the internal VCO when doing the loop filter design in the Clock Design Tool (https://www.ti.com/tool/CLOCKDESIGNTOOL)
Is there some additional information / steps needed to do the loop filter for an external VCXO with the internal VCO bypassed?
Should PLLatinum Sim be used for this loop filter design instead of the Clock Design Tool?
I know PLLatinum Sim specifically shows options for selecting external VCO when selecting the LMX2541xxxx devices.
Would this be the correct method to design the loop filter for use with an external VCXO? Or is Clock Design Tool suitable?