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Hi,
I'm trying to obtain valid A/D data from an ADS1247 interfacing a 4 wire PT100, but I can't obtain stable data (it change every sample and it doesn't seem related to my scenario).
My hardware setup is almost the same the one reported in TI AN SBAA180, paragraph 5. The only exception are:
Basically, it's this hardware setup from another TI document:
I can correctly write and read from registers, so I don't think that is a problem related to SPI bus.
My registers configuration is the following:
Can someone help me to understand where I'm going wrong?
Thanks a lot,
Carmine
Hi Carmine!
Welcome to our forum! Can you tell us what sort code swing you are getting from the ADS1247? Can you perhaps post an Excel files of your conversion results? Also if you can describe your PCB, that would be helpful as well.
Hi Tom,
thanks for your effort.
These are some data I'm obtaining (MSB-MID-LSB):
VAL: 127:255:255
VAL: 127:255:255
VAL: 127:255:255
VAL: 127:255:255
VAL: 127:115:163
VAL: 127:255:255
VAL: 127:255:255
VAL: 127:255:255
VAL: 127:255:255
VAL: 127:255:255
VAL: 124:186:151
VAL: 122:50:197
VAL: 125:151:134
VAL: 127:255:255
VAL: 126:189:179
VAL: 104:188:83
VAL: 115:233:208
VAL: 127:255:255
VAL: 127:255:255
VAL: 100:145:73
VAL: 120:187:83
VAL: 120:190:234
VAL: 118:236:212
VAL: 102:0:64
VAL: 113:209:31
VAL: 124:89:52
VAL: 123:141:117
VAL: 117:117:193
VAL: 125:47:34
VAL: 119:192:159
VAL: 121:60:200
VAL: 127:255:255
VAL: 127:255:255
VAL: 124:60:88
VAL: 124:111:149
VAL: 120:93:80
VAL: 114:198:223
VAL: 120:58:56
VAL: 127:255:255
VAL: 119:193:254
VAL: 123:21:59
VAL: 127:255:255
VAL: 121:82:106
VAL: 112:192:86
And this is the PCB layout:
I really appreciate your help.
Regards,
Carmine
I have to add that maybe there is a problem related to noise, because if I put the PT100 in my hands simply touching the plastic wire (not the sensor area), the results change dramatically. If I leave the PT100 on the table, results are exactly full-scale (0x7FFFFF).
I'm using a PT100 with 3mt long cable.
Carmine,
For SYS0 you have 0x70 which is a gain of 128. There are two things to consider. One is common mode input range and the other is full scale range. If your reference is about 1.2V and your input is approximately 0.15V, you can only gain up to a gain of 8 to match your full scale range. You will also need to make sure that you are within the common mode input range of the part. See the Design Notes section for more information:
Best regards,
Bob B
Hi Bob,
first of all thanks for your help.
I tried to lower the PGA gain, even setting SYS0 to 0x0, but now data are far from full-scale, but it's still totally random and not related to what I'm measuring.
Some hints to continue debug?
Carmine
Carmine,
After taking a closer look at your PCB I see that you basically have a single layer board with ground traces. You may want to check out the Design Notes on grounding:
I suspect that the grounding and layout have a role in the noise. It is always a good idea to have as large of ground area as possible. I doubt you will get solid readings until you fix the ground issues. I would make one side a solid ground plane and make via connections from the top side to the bottom side ground. I would also remove the ground traces all together, and make better supply routing.
Also, the bypass capacitor, C1, is really not effective. Notice that the supply runs directly to the DVDD and AVDD pins and then to the bypass cap. Noise will appear on the supply pins before it reaches the bypass cap. It is possible that you need some filtering on the inputs to reduce noise generated on the RTD lines. From your previous data it appears as if the input is oscillating so make sure you have good connections to the RTD.
I would verify that the reference voltage is stable at JP5 pin 4. I would also verify that the input voltage is stable at JP5 pins 2 and 3. This voltage should be about 0.15 V. If it is fluctuating a lot due to air currents, you might want to place the RTD in a glass of ice water so the temperature element is more stable.
Best regards,
Bob B
Hi Bob,
regarding the PCB layout you are totally right: it's a real bad designed PCB. There's a reason for this: this is an "hand made" PCB (a small prototype), and I routed connections to avoid 2 layer PCB which is not simple to do.
I already decided to make a better PCB and I'll do this before make any other tests. I'll submit you the layout later so I can take advantage of your precious help :-D
Regards,
Carmine
Another question.
Investigating with the oscilloscope on the AIN0 and AIN2 PIN (J5 P1 and P3), I found a noise of exactly 50HZ, which is the AC frequency in Italy. So, I think this a problem related to the long cable PT100 I'm using (it acts as antenna).
So, which kind of filter I should use? A simple low-pass filter is suited for this kind of applications?
Thanks a lot,
Carmine
Carmine,
You could add an RC filter at the input. You could also use a shielded cable. One thing that will help a lot is to use the built in 50/60 Hz rejection at 20sps or less. See Table 13 in the datasheet to see the attenuation values for the different sample rates.
Best regards,
Bob B
Hi bob,
I have completed the new layout of my board, with 2 layers and ground plane. It wold really nice if you can take a look to it and, eventually, give me suggests ;-)
Thaks a lot,
Carminee
Carmine,
This is much improved. I don't think that splitting the plane helps at all, so you might consider making it a solid ground plane. You should also have a cap from Vrefout to Vrefcom. If you reorder your inputs and move the analog inputs down one (AIN2 becomes AIN3, etc.) you can move the bottom trace from the analog connector to the topside of the board. It is good idea to terminate the unused analog input. You may want to add a bypass cap at the input to the DVDD supply. You may also want to add provisions for filtering at the analog inputs, and perhaps a cap across the reference. You may or may not need them, but having the provision makes it easier to add them if you do.
I'm not sure if you can reorder the JP1 connections, but if the connections were in a different order you could route everything on the top side of the board. You also might consider increasing the ground between the boards by making the open connections on JP1 ground as well. If you can't reorder, you may want to try and reduce the splits in the ground by bringing the DVDD supply to the outside of the connector (right side), routing pin 12 of JP1 to the inside instead of the outside of the ADS1247, then routing pin 14 of JP1 through the middle of the connector then up through to the ADS1247 between pins 8 and 10. I would shorten the split for CS by routing the the connection from JP1 pin 6 to come up between pins 2 and 4, then creating a short bottom layer trace so the vias are on each side of the DOUT line.
Hope that makes sense. Let me know if you have any further questions.
Best regards,
Bob B
Hi Bob,
thank you for the help. I acknowledged all your directives, so now there aren't any bottom layer traces. I routed all on the top.
I'll keep you updated.
Carmine
Hi Bob,
still here trying to figure out how to make this device working :-)
I received the new adapter which follows all directives you suggested. Now I'm able to properly read internal temperature diode and I can properly measure AVDD or DVDD too (MUXCAL set to 111). So I can interact with the device correctly.
Now the problem is to interface the RTD. I'm using a 4-wire RTD following the above schema, but I can obtain only full scale data, even if I set a PGA=1. This is the register configuration:
MUX0 = 0xA
MUX1 = 0x20
IDAC0 =0x7
IDAC1 = 0xF
SYS = 0x0 (or 0x70 as reported in the above TI schema).
As I said, I can obtain only full scale data 0x7fffff. What am I missing?
Thanks a lot,
Carmine
Carmine,
It appears that your register values are correct. Have you measured the voltage across the Rbias resistor used for establishing the reference? Generally when you see full scale, there is either a problem with the reference, or one of the inputs may be open. If you take a volt meter and measure across the Rbias resistor and the RTD, you should see a voltage and it should correlate with voltage you expect to see with the ADC. If you don't measure a voltage, then either the IDAC is not turning on, or there is an open in your wiring path.
Best regards,
Bob B
Hi Bob,
there are some things aren't clear to me. Measuring the voltage difference between different pin of RTD (it's a PT100), I've the following results:
Main power is about 3.25V.
Carmine,
You now have a problem with being outside of the common mode input range. More specific information can be found at:
So the input voltage must be at least 100mV below AVDD and above AVSS. If you use gain, greater than 1, you need to restrict it even further. Also, the reference voltage must be no greater than (AVDD-AVSS)-1, and in your case should be no greater than 2.25V for a 3.25V supply. So the easiest thing for you to do is lower the current output of the IDAC. If my rough calculations are correct and assuming some values you are using, if you set the IDAC output to 1mA instead of 1.5mA your system should work up to a gain of 16.
Best regards,
Bob B
Hi Bob,
first of all as usual thanks a lot for your effort.
I think that I've some strange behaviour related to my test hardware, but I can't understand what is wrong, Because even if I lower IDAC current to the minimum current (50uA), I still have a voltage difference between AIN0 and REFP0 of 3.2V, and a REFP0-REFN0 voltage of about 0.
I'm really confused.
Carmine
Carmine,
It appears that you have connected your RTD to a voltage source. The excitation for the RTD should come from the IDAC via AIN0. Is there a way you can take a picture or two of your setup so I can take a look at how you actually have the RTD connected to the ADS1247?
Best regards,
Bob B
Carmine,
I don't see a red flag with your circuit, but I can't see all the connections clearly. Do you have ground vias under the ADS1247? In particular, does REFN0 connected directly to ground? Also, it appears that bottom side (as shown on the picture) of the ADS1247 may have skewed somewhat when it was soldered down. I would use an ohm meter and make sure there is a connection between the pins of the ADS1247 and the board. If you want, send me your actual schematic and the gerbers for your board and I will look them over and verify that everything is ok.
Best regards,
Bob B
Hi Bob,
to be absolutely sure about soldering, I made another board and the behaviour is the same :-( I'm sure that the problem isn't related to assembly.
These are layout and schematics.
Carmine,
For troubleshooting I would do the following. First I would completely turn off the IDAC current, and and verify that there is no voltage from AIN0 to ground. Second thing I would do is check with an ohm meter that the RTD resistance value isn't much much higher than would be expected at room temperature. Third is I would go over my communication again. By the way, MUX0 register should be 0x0A. I would also verify with a scope that I'm writing the correct value to all the registers. Do you write the registers in a block, or individually?
If you click on my name you can start a conversation ( or discussion) with me directly and we can try to resolve this more efficiently.
Best regards,
Bob B
Bob,
whether you believe it or not, my PT100 is broken :-#
I'm going crazy because the PT100 I'm using doesn't work any more! I changed the PT100 with a simple 1% 100ohm resistor and all works properly!!!
Thanks a lot Bob you give me a huge help on this project :-)