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Interfacing DAC34SH84EVM to FPGA Dev. board

Giovanni Donati
Prodigy 90 points
Other Parts Discussed in Thread: DAC34SH84, DAC34H84EVM, FMC-DAC-ADAPTER

Hello to everyone,

I am writing here in order to ask some information about the interfacing of the DAC34SH84 Evalutation module, to my FPGA board.

Basically what I would like to do is to generate two output signals with my FPGA and send them to the next device. The problem is that I woul like to generate two high frequency signals and send them separately. I woul need the DAC/DACs to work with 1.5 GSPS on both channels. I admit that is the first time that I actually deal with hardware, and in this meaning I would need a little help to find out how I can interconnect all my devices.

So the questions are:

1) Can I reach, with the DAC34SH84 Evalutation module, this sample speed?

2) Would it be possible to reconstruct both the input signals and send them separateli on the output channels, is the interleaving working for both channels? (as each channel comes out with 750 GSPS)? Or should I use two separate refencence boards in order to obtain those results?

3) In case I need two Ref. Boards, on my FPGA Dev board I have 2 HSMC connectors, would I have the opportunity to connect both the DAC Boards to it? In your experience do I need some adapters?

Thank you in advance for your help and consideration.

All the best,

Giovanni.

  • 0
    TI__Guru 67944 points

    Hello Giovanni,

    Regarding the digital interface of the DAC34SH84, you can also refer to the forum post below for detail.

    http://e2e.ti.com/support/data_converters/high_speed_data_converters/f/68/t/231300.aspx

    1. The DAC34SH84 supports up to 750MSPS of input data rate per channel. This means each of A, B, C, and D channels has 750MSPS of max input data rate. After interpolation, the DAC analog output can update the data at maximum of 1.5GSPS of update rate for each channel.

    2. I am not sure about this question. Could you please clarify? This DAC does not support interleaving.

    3. This will depend on the type of FPGA EVM. The DAC34SH84 EVM now comes with locking connector to allow stable connection to our TSW1400. You may need to change the DAC34SH84 EVM connector to QTH-060-01-L-D_DP-A to allow support to the FPGA EVMs. This connector eliminates the single-ended pins in between the differential pairs. This will prevent shorting the power supplies on the HSMC host board to the ground connections on the DAC34SH84EVM.  The omission of the single-ended pins also creates an air gap between the differential pairs for iolsation, hence improving signal integrity.

    For more detail, please refer to the following post/link:

    http://e2e.ti.com/support/data_converters/high_speed_data_converters/f/68/p/250285/876915.aspx#876915

    http://www.altera.com/literature/ds/hsmc_spec.pdf

    -KH

  • 0 in reply to Kang Hsia
    Prodigy 90 points

    Hello Kang,

    first of all I thank you for your answer, it clarified me some points which I still didn´t think about.

    About point two, I was just confused and I have typed "interleaving" instead of "interpolation", but you have answered right to the question anyway. After this we have decided to change our hardware orientation.

    Thanks again for your help.

    Giovanni.

  • 0 in reply to Giovanni Donati
    TI__Guru 67944 points

    Hi Giovanni,

    The DAC348x have interpolation stages for each channel. To understand more about our high speed DACs, you may refer to the following app note:

    http://www.ti.com/litv/pdf/slaa523a

    -KH

  • 0 in reply to Kang Hsia
    Prodigy 90 points

    Hello,

    I have received my evaluation boards, but now I have another problem in interfacing them to my Altera FPGA Board.

    At the moment it is problematic for us to connect the board to our FPGA Board (Terasic TR4), because of the connector´s type.

    The metal spikes are not exactly matching the holes but furthermore the connector´s shape is not matching the standard HSMC connectors.

    There is a plastic "nose" on the connector side which avoids any kind of mechanical matching with a common HSMC. The question is if, could be enough for us to modify the piece, removing the two metal spikes and the plastic nose in order to match the shapes? Or there is even an electric incompatibility?

    On the website it is written:

    "The DAC34H84EVM is also compatible with Xilinx and Altera based FPGA EVMs and design kits for rapid evaluation and prototyping. The DAC34H84EVM includes an HSMC input for direct connection to HSMC compatible Altera based FPGA EVMs. The FMC-DAC-ADAPTER board available from TI enables the connection of the DAC34H84EVM to the FMC header on Xilinx based EVMs."

    How can I manage to reach my goal and interface the two pieces? Is there any workaround?


    All the Best,

    Giovanni.

  • 0 in reply to Giovanni Donati
    TI__Guru 67944 points

    Hi Giovanni,

    I will work with you offline to get a replacement EVM with the correct connector that will work with Altera FPGA EVMs.

    -Kang